AD9230-11 Analog Devices, AD9230-11 Datasheet - Page 23
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AD9230-11
Manufacturer Part Number
AD9230-11
Description
11-Bit, 200 MSPS, 1.8 V Analog-to-Digital Converter
Manufacturer
Analog Devices
Datasheet
1.AD9230-11.pdf
(28 pages)
Specifications of AD9230-11
Resolution (bits)
11bit
# Chan
1
Sample Rate
200MSPS
Interface
LVDS,Par
Analog Input Type
Diff-Uni
Ain Range
1.25 V p-p
Adc Architecture
Pipelined
Pkg Type
CSP
Addr.
(Hex)
ADC Functions
0x08
0x09
0x0D
0x0F
0x14
0x15
16
ain_config
Register Name
modes
clock
test_io
output_mode
output_adjust
output_phase
Bit 7
(MSB)
0
0
0
0
0
0
Output
clock
polarity
1 =
inverted
0 =
normal
(default)
Bit 6
0
0
0
0
0
0
0
Bit 5
PWDN:
0 = full
(default)
1 =
standby
0
Reset
PN23
gen:
1 = on
0 = off
(default)
0
0
0
0
Bit 4
0
0
Reset
PN9 gen:
1 = on
0 = off
(default)
0
Output
enable:
0 =
enable
(default)
1 =
disable
0
0
Rev. 0 | Page 23 of 28
Bit 3
0
0
0
DDR:
1 =
enabled
0 =
disabled
(default)
LVDS
course
adjust:
0 =
3.5 mA
(default)
1 =
2.0 mA
0
Output test mode:
0000 = off (default)
0001 = midscale short
0010 = +FS short
0011 = −FS short
0100 = checker board output
0101 = PN 23 sequence
0110 = PN 9
0111 = one/zero word toggle
1000 = unused
1001 = unused
1010 = unused
1011 = unused
1100 = unused
(Format determined by output_mode)
0
Analog
Bit 2
001 = full power-down
010 = standby
011 = normal (power-up)
overrides this setting
input
disable:
1 = on
0 = off
(default)
Output
invert:
1 = on
0 = off
(default)
0
Internal power-down mode:
000 = normal (power-up, default)
Note: external PWDN pin
LVDS fine adjust:
001 = 3.50 mA
010 = 3.25 mA
011 = 3.00 mA
100 = 2.75 mA
101 = 2.50 mA
110 = 2.25 mA
111 = 2.00 mA
Bit 1
0
CML
enable:
1 = on
0 = off
(default)
0
Data format select:
00 = offset binary
(default)
01 = twos
complement
10 = gray code
Bit 0
(LSB)
Duty
cycle
stabilizer:
0 =
disabled
1 =
enabled
(default)
0
Default
Value
(Hex)
0x00
0x01
0x00
0x00
0x00
0x00
0x03
AD9230-11
Notes/
Comments
Determines various
generic modes of
chip operation.
When this register
is set, the test data
is placed on the
output pins in
place of normal
data.