AD9230-11 Analog Devices, AD9230-11 Datasheet - Page 21
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AD9230-11
Manufacturer Part Number
AD9230-11
Description
11-Bit, 200 MSPS, 1.8 V Analog-to-Digital Converter
Manufacturer
Analog Devices
Datasheet
1.AD9230-11.pdf
(28 pages)
Specifications of AD9230-11
Resolution (bits)
11bit
# Chan
1
Sample Rate
200MSPS
Interface
LVDS,Par
Analog Input Type
Diff-Uni
Ain Range
1.25 V p-p
Adc Architecture
Pipelined
Pkg Type
CSP
Table 11. Serial Timing Definitions
Parameter
t
t
t
t
t
t
t
t
t
Table 12. Output Data Format
Input (V)
VIN+ − VIN−
VIN+ − VIN−
VIN+ − VIN−
VIN+ − VIN−
VIN+ − VIN−
DS
DH
CLK
S
H
HI
LO
EN_SDIO
DIS_SDIO
Timing (minimum, ns)
5
2
40
5
2
16
16
1
5
Condition (V)
< 0.62
= 0.62
= 0
= 0.62
> 0.62 + 0.5 LSB
Offset Binary Output Mode
D10 to D0
0000 0000 000
0000 0000 000
0000 0000 000
1111 1111 111
1111 1111 111
Description
Setup time between the data and the rising edge of SCLK
Hold time between the data and the rising edge of SCLK
Period of the clock
Setup time between CSB and SCLK
Hold time between CSB and SCLK
Minimum period that SCLK should be in a logic high state
Minimum period that SCLK should be in a logic low state
Minimum time for the SDIO pin to switch from an input to an output relative to the SCLK
falling edge (not shown in Figure 33)
Minimum time for the SDIO pin to switch from an output to an input relative to the SCLK
rising edge (not shown in Figure 33)
Rev. 0 | Page 21 of 28
Twos Complement Mode
D10 to D0
1000 0000 000
1000 0000 000
0000 0000 000
0111 1111 111
0111 1111 111
AD9230-11
OR
1
0
0
0
1