AD7147A Analog Devices, AD7147A Datasheet - Page 5

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AD7147A

Manufacturer Part Number
AD7147A
Description
Manufacturer
Analog Devices
Datasheet

Specifications of AD7147A

Resolution (bits)
16bit
# Chan
13
Sample Rate
111SPS
Interface
I²C/Ser 2-Wire,Ser,SPI
Analog Input Type
Capacitive
Ain Range
± 8 pF (Delta C)
Adc Architecture
Sigma-Delta
Pkg Type
CSP

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SPI TIMING SPECIFICATIONS (AD7147A)
T
noted. All input signals are specified with t
Table 4. SPI Timing Specifications
Parameter
f
t
t
t
t
t
t
t
t
SPI Timing Diagram
SCLK
1
2
3
4
5
6
7
8
A
= −40°C to +85°C, sample tested at 25°C to ensure compliance. V
SCLK
SDO
SDI
CS
Limit
5
5
20
20
15
15
20
16
15
t
1
t
4
MSB
t
t
1
2
5
R
= t
2
F
t
= 5 ns (10% to 90% of V
3
3
Figure 2. SPI Detailed Timing Diagram
ns min
ns max
Unit
MHz max
ns min
ns min
ns min
ns min
ns max
ns min
Rev. B | Page 5 of 68
DRIVE
CC
Description
SCLK frequency
CS falling edge to first SCLK falling edge
SCLK high pulse width
SCLK low pulse width
SDI setup time
SDI hold time
SDO access time after SCLK falling edge
CS rising edge to SDO high impedance
SCLK rising edge to CS high
= 1.65 V to 3.6 V, and V
15
) and timed from a voltage level of 1.6 V.
LSB
16
MSB
1
t
6
CC
2
= 2.6 V to 3.6 V, unless otherwise
15
LSB
t
16
8
t
7
AD7147A

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