AD9265 Analog Devices, AD9265 Datasheet - Page 8

• Manufacturer Part Number: AD9265
• Description: 16-Bit, 125 MSPS/105 MSPS/80 MSPS, 1.8 V Analog-to-Digital Converter
• Manufacturer: Analog Devices

Specifications of AD9265

• Resolution (bits): 16bit
• # Chan: 1
• Sample Rate: 125MSPS
• Interface: LVDS,Par
• Analog Input Type: Diff-Uni
• Ain Range: (2Vref) p-p,1 V p-p,2 V p-p
• Adc Architecture: Pipelined
• Pkg Type: CSP

AD9265
SWITCHING SPECIFICATIONS
−1.0 dBFS differential input, 1.0 V internal reference, and DCS enabled, unless otherwise noted.
Table 4.
Parameter
CLOCK INPUT PARAMETERS
DATA OUTPUT PARAMETERS
OUT-OF-RANGE RECOVERY TIME
1
2
3
4
5
The suffix following the part number refers to the model found in the Ordering Guide section.
Conversion rate is the clock rate after the divider.
See the Input Clock Divider section for additional information on using the DCS with the input clock divider.
Additional DCO delay can be added by writing to Bit 0 through Bit 4 in SPI Register 0x17 (see Table 17).
Wake-up time is defined as the time required to return to normal operation from power-down mode.
CLK Period—Divide-by-1 Mode (t
Input Clock Rate
Conversion Rate
CLK Pulse Width High (t
Aperture Delay(t
Aperture Uncertainty (Jitter, t
CMOS Mode
LVDS Mode
Wake-Up Time
Divide-by-3 Mode, Divide-by-5 Mode, and
Data Propagation Delay (t
DCO Propagation Delay (t
Pipeline Delay (Latency)
DCO to Data Skew (t
Pipeline Delay (Latency)
DCS Enabled
DCS Disabled
Divide-by-1 Mode, DCS Enabled
Divide-by-1 Mode, DCS Disabled
Divide-by-2 Mode, Divide-by-4 Mode, Divide-
DCO to Data Skew (t
Data Propagation Delay (t
DCO Propagation Delay (t
Divide-by-7 Mode, DCS Enabled
by-6 Mode and Divide-by-8 Mode, DCS
Enabled or DCS Disabled
5
2
A
)
SKEW
SKEW
CH
)
)
)
J
DCO
)
PD
PD
DCO
)
)
)
)
4
CLK
3
4
)
3
Temp
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Rev. A | Page 8 of 44
Min
12.5
0.8
0.8
2.4
2.7
0.3
2.6
3.3
−0.3
20
10
3.75
5.9
AD9265BCPZ-80
Typ
6.25
6.25
1.0
0.07
2.8
3.4
0.6
12
3.4
3.8
0.4
12.5
500
2
Max
3.4
4.2
0.9
4.2
4.3
1.2
625
80
80
8.75
6.6
1
Min
20
10
9.5
2.85
4.5
0.8
0.8
2.4
2.7
0.3
2.6
3.3
−0.3
AD9265BCPZ-105
Typ
4.75
4.75
1.0
0.07
2.8
3.4
0.6
12
3.4
3.8
0.4
12.5
500
2
Max
625
105
105
6.65
5.0
3.4
4.2
0.9
4.2
4.3
1.2
1
Min
20
10
8
2.4
3.8
0.8
0.8
2.4
2.7
0.3
2.6
3.3
−0.3
AD9265BCPZ-125
Typ
4
4
1.0
0.07
2.8
3.4
0.6
12
3.4
3.8
0.4
12.5
500
2
Max
625
125
125
5.6
4.2
3.4
4.2
0.9
4.2
4.3
1.2
1
Unit
MHz
MSPS
MSPS
ns
ns
ns
ns
ns
ns
ps rms
ns
ns
ns
Cycles
ns
ns
ns
Cycles
μs
Cycles