SAM3S8C Atmel Corporation, SAM3S8C Datasheet - Page 704
SAM3S8C
Manufacturer Part Number
SAM3S8C
Description
Manufacturer
Atmel Corporation
- Current page: 704 of 1143
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32.6
32.6.1
32.6.2
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
Product Dependencies
I/O Lines
Power Management
The pins used for interfacing the USART may be multiplexed with the PIO lines. The program-
mer must first program the PIO controller to assign the desired USART pins to their peripheral
function. If I/O lines of the USART are not used by the application, they can be used for other
purposes by the PIO Controller.
To prevent the TXD line from falling when the USART is disabled, the use of an internal pull up
is mandatory. If the hardware handshaking feature or Modem mode is used, the internal pull up
on TXD must also be enabled.
All the pins of the modems may or may not be implemented on the USART. Only
equipped with all the modem signals. On USARTs not equipped with the corresponding pin, the
associated control bits and statuses have no effect on the behavior of the USART.
Table 32-3.
The USART is not continuously clocked. The programmer must first enable the USART Clock in
the Power Management Controller (PMC) before using the USART. However, if the application
does not require USART operations, the USART clock can be stopped when not needed and be
restarted later. In this case, the USART will resume its operations where it left off.
Configuring the USART does not require the USART clock to be enabled.
Instance
USART0
USART0
USART0
USART0
USART0
USART1
USART1
USART1
USART1
USART1
USART1
USART1
USART1
USART1
USART2
USART2
USART2
USART2
USART2
I/O Lines
Signal
DCD1
RXD0
SCK0
DSR1
DTR1
RXD1
SCK1
RXD2
SCK2
CTS0
RTS0
TXD0
CTS1
RTS1
TXD1
CTS2
RTS2
TXD2
RI1
I/O Line
PC16
PC14
PC17
PC10
PA25
PA26
PA28
PA27
PA29
PA24
PA21
PA23
PA22
PC9
PA8
PA7
PA5
PA2
PA6
SAM3S8/SD8
SAM3S8/SD8
Peripheral
A
A
A
B
A
A
A
A
A
A
A
A
A
A
B
B
B
B
B
USART1
fully
704
704
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