SAM3N00A Atmel Corporation, SAM3N00A Datasheet - Page 536

• Manufacturer Part Number: SAM3N00A
• Manufacturer: Atmel Corporation

30.7.3.4
Figure 30-11. Receiver Status
536
536
Baud Rate
US_RHR
SAM3N
SAM3N
RXRDY
US_CR
OVRE
Clock
Write
Read
Receiver Operations
RXD
Start
Bit
Figure 30-10. Synchronous Mode Character Reception
When a character reception is completed, it is transferred to the Receive Holding Register
(US_RHR) and the RXRDY bit in the Status Register (US_CSR) rises. If a character is com-
pleted while the RXRDY is set, the OVRE (Overrun Error) bit is set. The last character is
transferred into US_RHR and overwrites the previous one. The OVRE bit is cleared by writing
the Control Register (US_CR) with the RSTSTA (Reset Status) bit to 1.
D0
D1
Example: 8-bit, Parity Enabled 1 Stop
Baud Rate
Sampling
D2
Clock
RXD
D3
D4
D5
Start
D6
D7
Parity
Bit
D0
Stop
Bit
Start
Bit
D1
D0
D1
D2
D2
D3
D3
D4
D4
D5
D6
D5
D7
Parity
Bit
Stop
D6
Bit
RSTSTA = 1
D7
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
Parity Bit
Stop Bit