SAM3N00A Atmel Corporation, SAM3N00A Datasheet - Page 479

• Manufacturer Part Number: SAM3N00A
• Manufacturer: Atmel Corporation

Figure 28-20. TWI Read Operation with Multiple Data Bytes with or without Internal Address
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
No
Read Receive Holding register (TWI_RHR)
Read Receive Holding register (TWI_RHR)
(CLDIV, CHDIV, CKDIV) in TWI_CWGR
- Internal address size (if IADR used)
Set the Master Mode register:
TWI_CR = MSEN + SVDIS
Read ==> bit MREAD = 1
Internal address size = 0?
Set the Control register:
- Device slave address
- Transfer direction bit
Read Status register
Read Status register
Read status register
(Needed only once)
TWI_CR = START
TWI_CR = STOP
Yes
Last data to read
Start the transfer
Stop the transfer
- Master enable
TXCOMP = 1?
Set TWI clock
RXRDY = 1?
Yes
Yes
Yes
RXRDY = 1?
Yes
but one?
BEGIN
END
No
No
No
Set the internal address
TWI_IADR = address
SAM3N
SAM3N
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