SAM9M11 Atmel Corporation, SAM9M11 Datasheet - Page 278

• Manufacturer Part Number: SAM9M11
• Manufacturer: Atmel Corporation

Specifications of SAM9M11

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 2
• Uart: 5
• Lin: 4
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: Yes
• Camera Interface: Yes
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Dac Resolution (bits): No
• Temp. Sensor: No
• Crypto Engine: AES/DES
• Sram (kbytes): 64
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Glossary
PSR
Reduced Instruction Set Computer
RISC
Saved Program Status Register
SBO
SBZ
Should Be One fields
Should Be Zero fields
Software Interrupt Instruction
SPSR
Stack pointer
Glossary-4
Also referred to as Current PSR (CPSR), to emphasize the distinction between it and
the Saved PSR (SPSR). The SPSR holds the value the PSR had when the current
function was called, and which will be restored when control is returned.
See Program Status Register.
A type of microprocessor that recognizes a lower number of instructions in comparison
with a Complex Instruction Set Computer. The advantages of RISC architectures are:
•
•
See also Complex Instruction Set Computer.
See Reduced Instruction Set Computer
The Saved Program Status Register which is associated with the current processor mode
and is undefined if there is no such Saved Program Status Register, as in User mode or
System mode.
See also Program Status Register.
See Should Be One fields.
See Should Be Zero fields.
Should be written as one (or all ones for bit fields) by software. Values other than one
produces unpredictable results.
See also Should Be Zero fields.
Should be written as zero (or all 0s for bit fields) by software. Values other than zero
produce unpredictable results.
See also Should Be One fields.
This instruction enters Supervisor mode to request a particular operating system
function.
See Saved Program Status Register.
A register or variable pointing to the top of a stack. If the stack is full stack the SP points
to the most recently pushed item, else if the stack is empty, the SP points to the first
empty location, where the next item will be pushed.
they can execute their instructions very fast because the instructions are so simple
they require fewer transistors, this makes them cheaper to produce and more
power efficient.
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