SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 92
SAM9M10
Manufacturer Part Number
SAM9M10
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9261.pdf
(248 pages)
3.SAM9M10.pdf
(59 pages)
4.SAM9M10.pdf
(1398 pages)
Specifications of SAM9M10
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
Yes
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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Memory Management Unit
3.5.4
3-28
Permission faults
If the two-bit domain field returns 01 (client), then access permissions are checked as
follows:
Section
Large page or small page
Tiny page
Copyright © 2001-2003 ARM Limited. All rights reserved.
If the level one descriptor defines a section-mapped access, the AP bits of
the descriptor define whether or not the access is allowed, according to
Table 3-12 on page 3-24. Their interpretation is dependent on the setting
of the S and R bits (CP15 c1 bits 8 and 9). If the access is not allowed, a
section permission fault is generated.
If the level one descriptor defines a page-mapped access and the level two
descriptor is for a large or small page, four access permission fields (ap3
to ap0) are specified, each corresponding to one quarter of the page. For
small pages ap3 is selected by the top 1KB of the page and ap0 is selected
by the bottom 1KB of the page. For large pages, ap3 is selected by the top
16KB of the page and ap0 is selected by the bottom 16KB of the page.
The selected AP bits are then interpreted in exactly the same way as for
a section (see Table 3-12 on page 3-24), the only difference is that the
fault generated is a page permission fault.
If the level one descriptor defines a page-mapped access, and the level
two descriptor is for a tiny page, the AP bits of the level one descriptor
define whether or not the access is allowed in the same way as for a
section. The fault generated is a page permission fault.
ARM DDI0198D
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