SAM9G46 Atmel Corporation, SAM9G46 Datasheet - Page 111

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SAM9G46

Manufacturer Part Number
SAM9G46
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM9G46

Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
AES/DES
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No/Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
14. Reset Controller (RSTC)
14.1
14.2
11053B–ATARM–22-Sep-11
11053B–ATARM–22-Sep-11
Description
Embedded Characteristics
The Reset Controller (RSTC), based on power-on reset cells, handles all the resets of the sys-
tem without any external components. It reports which reset occurred last.
The Reset Controller also drives independently or simultaneously the external reset and the
peripheral and processor resets.
• Manages All Resets of the System, Including
• Based on 2 Embedded Power-on Reset Cells
• Reset Source Status
• External Reset Signal Shaping
• AMBA
– External Devices Through the NRST Pin
– Processor Reset
– Peripheral Set Reset
– Backed-up Peripheral Reset
– Status of the Last Reset
– Either General Reset, Wake-up Reset, Software Reset, User Reset, Watchdog
– Interfaces to the ARM
Reset
-compliant Interface
®
Advanced Peripheral Bus
SAM9G35
SAM9G35
111
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