SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 124
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SAM9263
Manufacturer Part Number
SAM9263
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.M40800.pdf
(153 pages)
3.SAM9260.pdf
(290 pages)
4.SAM9261.pdf
(248 pages)
5.SAM9263.pdf
(1109 pages)
6.SAM9263.pdf
(51 pages)
Specifications of SAM9263
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Can
1
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
96
Self Program Memory
NO
External Bus Interface
2
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
Clock Control
124
AT91X40 Series
The selected clock can be inverted with the CLKI bit in TC_CMR (Channel Mode). This
allows counting on the opposite edges of the clock.
The burst function allows the clock to be validated when an external signal is high. The
BURST parameter in the Mode Register defines this signal (none, XC0, XC1, XC2).
Note:
Figure 44. Clock Selection
The clock of each counter can be controlled in two different ways: it can be enabled/dis-
abled and started/stopped.
•
•
The clock can be enabled or disabled by the user with the CLKEN and the CLKDIS
commands in the Control Register. In Capture Mode it can be disabled by an RB
load event if LDBDIS is set to 1 in TC_CMR. In Waveform Mode, it can be disabled
by an RC Compare event if CPCDIS is set to 1 in TC_CMR. When disabled, the
start or the stop actions have no effect: only a CLKEN command in the Control
Register can re-enable the clock. When the clock is enabled, the CLKSTA bit is set
in the Status Register.
The clock can also be started or stopped: a trigger (software, synchro, external or
compare) always starts the clock. The clock can be stopped by an RB load event in
Capture Mode (LDBSTOP = 1 in TC_CMR) or a RC compare event in Waveform
Mode (CPCSTOP = 1 in TC_CMR). The start and the stop commands have effect
only if the clock is enabled.
In all cases, if an external clock is used, the duration of each of its levels must be longer
than the system clock (MCK) period. The external clock frequency must be at least 2.5
times lower than the system clock (MCK).
MCK/2
MCK/8
MCK/32
MCK/128
MCK/1024
XC0
XC1
XC2
1
CLKS
BURST
CLKI
Selected
Clock
1354D–ATARM–08/02