SAM7SE32 Atmel Corporation, SAM7SE32 Datasheet - Page 25

• Manufacturer Part Number: SAM7SE32
• Manufacturer: Atmel Corporation

Specifications of SAM7SE32

• Flash (kbytes): 32 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 48 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 88
• Ext Interrupts: 88
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 1
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

8.1.2.2
8.1.2.3
8.1.2.4
6222ES–ATARM–15-Dec-09
Embedded Flash Controller
Lock Regions
Security Bit Feature
The Flash benefits from the integration of a power reset cell and from the brownout detector.
This prevents code corruption during power supply changes, even in the worst conditions.
The Embedded Flash Controller (EFC) manages accesses performed by the masters of the sys-
tem. It enables reading the Flash and writing the write buffer. It also contains a User Interface,
mapped within the Memory Controller on the APB. The User Interface allows:
The Embedded Flash Controller also provides a dual 32-bit Prefetch Buffer that optimizes 16-bit
access to the Flash. This is particularly efficient when the processor is running in Thumb mode.
The AT91SAM7SE512 Embedded Flash Controller manages 32 lock bits to protect 32 regions
o f t h e f l a s h a g a i n s t i n a d v e r t e n t f l a s h e r a s i n g o r p r o g r a m m i n g c o m m a n d s . T h e
AT91SAM7SE512 contains 32 lock regions and each lock region contains 64 pages of 256
bytes. Each lock region has a size of 16 Kbytes.
The AT91SAM7SE256 Embedded Flash Controller manages 16 lock bits to protect 16 regions
o f t h e f l a s h a g a i n s t i n a d v e r t e n t f l a s h e r a s i n g o r p r o g r a m m i n g c o m m a n d s . T h e
AT91SAM7SE256 contains 16 lock regions and each lock region contains 64 pages of 256
bytes. Each lock region has a size of 16 Kbytes.
The AT91SAM7SE32 Embedded Flash Controller manages 8 lock bits to protect 8 regions of
the flash against inadvertent flash erasing or programming commands. The AT91SAM7SE32
contains 8 lock regions and each lock region contains 32 pages of 128 bytes. Each lock region
has a size of 4 Kbytes.
If a locked-region’s erase or program command occurs, the command is aborted and the EFC
triggers an interrupt.
The 32 (AT91SAM7SE512), 16 (AT91SAM7SE256) or 8 (AT91SAM7SE32) NVM bits are soft-
ware programmable through the EFC User Interface. The command “Set Lock Bit” enables the
protection. The command “Clear Lock Bit” unlocks the lock region.
Asserting the ERASE pin clears the lock bits, thus unlocking the entire Flash.
The AT91SAM7SE512/256/32 features a security bit, based on a specific NVM-bit. When the
security is enabled, any access to the Flash, either through the ICE interface or through the Fast
Flash Programming Interface, is forbidden.
• programming of the access parameters of the Flash (number of wait states, timings, etc.)
• starting commands such as full erase, page erase, page program, NVM bit set, NVM bit
• getting the end status of the last command
• getting error status
• programming interrupts on the end of the last commands or on errors
• Two EFCs (EFC0 and EFC1) are embedded in the SAM7SE512 to control each plane of 256
• One EFC (EFC0) is embedded in the SAM7SE256 to control the single plane 256 KBytes.
• One EFC (EFC0) is embedded in the SAM7SE32 to control the single plane 32 KBytes.
clear, etc.
KBytes. Dual plane organization allows concurrent Read and Program.
AT91SAM7SE512/256/32 Summary
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