R40008 Atmel Corporation, R40008 Datasheet - Page 194

• Manufacturer Part Number: R40008
• Manufacturer: Atmel Corporation

Specifications of R40008

• Flash (kbytes): 0 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 75 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 32
• Ext Interrupts: 32
• Usb Speed: No
• Usb Interface: No
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 256
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• 32khz Rtc: No
• Calibrated Rc Oscillator: No

AC and DC Parameters
7.18
7-22
Memory clock timing
Figure 7-17 shows the ARM7TDMI processor memory clock timing. The timing
parameters used in Figure 7-17 are listed in Table 7-17.
In Figure 7-17, the core is not clocked by the HIGH phase of MCLK when nWAIT is
LOW. During the cycles shown, nMREQ and SEQ change once, during the first LOW
phase of MCLK, and A[31:0] change once, during the second HIGH phase of MCLK.
Phase 2 is shown for reference. This is the internal clock from which the core times all
its activity. This signal is included to show how the HIGH phase of the external MCLK
has been removed from the internal core clock.
Note
nMREQ
A[31:0]
nWAIT
Copyright © 1994-2001. All rights reserved.
MCLK
ECLK
SEQ
Symbol
T
T
T
T
T
T
addr
mckh
mckl
msd
wh
ws
T
msd
T
mckl
T
ws
Parameter
MCLKr to address valid
MCLK HIGH time
MCLK LOW time
MCLKf to nMREQ and SEQ valid
nWAIT hold from MCLKf
nWAIT setup to MCLKr
T
mckh
Table 7-17 MCLK timing parameters
T
wh
Figure 7-17 MCLK timing
T
Maximum
Minimum
Minimum
Parameter type
Maximum
Minimum
Minimum
addr
ARM DDI 0029G