M55800A Atmel Corporation, M55800A Datasheet - Page 13

• Manufacturer Part Number: M55800A
• Manufacturer: Atmel Corporation

Specifications of M55800A

• Flash (kbytes): 0 Kbytes
• Pin Count: 176
• Max. Operating Frequency: 33 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 58
• Ext Interrupts: 58
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 3
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 72
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3/5.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

7. Product Overview
7.1
7.2
1745FS–ATARM–18-Apr-06
Power Supplies
Input/Output Considerations
The AT91M55800A has 5 kinds of power supply pins:
VDDIO and VDDCORE are separated to permit the I/O lines to be powered with 5V, thus
resulting in full TTL compliance.
The following ground pins are provided:
All of these ground pins must be connected to the same voltage (generally the board electric
ground) with wires as short as possible. GNDPLL, GNDA and GNDBU are provided sepa-
rately in order to allow the user to add a decoupling capacitor directly between the power and
ground pads. In the same way, the PLL filter resistor and capacitors must be connected to the
device and to GNDBU with wires as short as possible. Also, the external load capacitances of
the main oscillator crystal and the 32768 Hz crystal must be connected respectively to GND-
PLL and to GNDBU with wires as short as possible.
The main constraints applying to the different voltages of the device are:
The nominal power combinations supported by the AT91M55800A are described in the follow-
ing table:
Table 7-1.
After the reset, the peripheral I/Os are initialized as inputs to provide the user with maximum
flexibility. It is recommended that in any application phase, the inputs to the AT91M55800A
microcontroller be held at valid logic levels to minimize the power consumption.
• VDDCORE pins, which power the chip core
• VDDIO pins, which power the I/O Lines
• VDDPLL pins, which power the oscillator and PLL cells
• VDDA pins, which power the analog peripherals ADC and DAC
• VDDBU pins, which power the RTC, the 32768 Hz oscillator and the Shut-down Logic of
• GND for both VDDCORE and VDDIO
• GNDPLL for VDDPLL
• GNDA for VDDA
• GNDBU for VDDBU
• VDDBU must be lower than or equal to VDDCORE
• VDDA must be higher than or equal to VDDCORE
• VDDCORE must be lower than or equal to VDDIO
the APMC
VDDIO
3.3V
3V
5V
VDDCORE
Nominal Power Combinations
3.3V
3.3V
3V
VDDA
3.3V
3.3V
3V
VDDPLL
3.3V
3.3V
3V
AT91M55800A Summary
VDDBU
3.3V
3.3V
3V
Maximum Operating
Frequency
33 MHz
33 MHz
33 MHz
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