ATxmega128A1 Atmel Corporation, ATxmega128A1 Datasheet - Page 13

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ATxmega128A1

Manufacturer Part Number
ATxmega128A1
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega128A1

Flash (kbytes)
128 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
78
Ext Interrupts
78
Usb Speed
No
Usb Interface
No
Spi
12
Twi (i2c)
4
Uart
8
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
8
Eeprom (bytes)
2048
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
8
Output Compare Channels
24
Input Capture Channels
24
Pwm Channels
24
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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7.4.4
8067M–AVR–09/10
EBI - External Bus Interface
The External Bus Interface (EBI) is the interface for connecting external peripheral and memory
to the data memory space. The XMEGA A1 has 3 ports that can be used for the EBI. It can inter-
face external SRAM, SDRAM, and/or peripherals such as LCD displays and other memory
mapped devices.
The address space, and the number of pins used, for the external memory is selectable from
256 bytes (8-bit) and up to 16M bytes (24-bit). Various multiplexing modes for address and data
lines can be selected for optimal use of pins when more or less pins is available for the EBI.
Each of the four chip selects has seperate configuration, and can be configured for SRAM,
SRAM Low Pin Count (LPC) or SDRAM. The data memory address space associated for each
chip select is decided by a configurable base address and address size for each chip celect.
For SDRAM both 4-bit SDRAM is supported, and SDRAM configurations such as CAS Latency
and Refresh rate is configurable in software.
The EBI is clocked from the Peripheral 2x Clock, running up to two times faster than the CPU
and supporting speeds of up to 64 MHz.
Supports SRAM up to
Supports SDRAM up to
Four software configurable Chip Selects
Software configurable Wait State insertion
Clocked from the Peripheral 2x Clock at up to two times the CPU clock speed
– 512K Bytes using 2-port EBI
– 16M Bytes using 3-port EBI
– 128M bit using 3-port EBI
XMEGA A1
13

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