ATtiny88 Automotive Atmel Corporation, ATtiny88 Automotive Datasheet - Page 74

• Manufacturer Part Number: ATtiny88 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATtiny88 Automotive

• Flash (kbytes): 8 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 28
• Ext Interrupts: 28
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 64
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 2
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

10.4.3
10.4.4
10.4.5
10.4.6
10.4.7
10.4.8
74
ATtiny88 Automotive
PORTA – The Port A Data Register
DDRA – The Port A Data Direction Register
PINA – The Port A Input Pins
PORTB – The Port B Data Register
DDRB – The Port B Data Direction Register
PINB – The Port B Input Pins
• Bits 3..0 – PUDx: Port-Wise Pull-up Disable
When these bits are written to one, the port-wise pull-ups in the defined I/O ports are disabled
even if the DDxn and PORTxn Registers are configured to enable the pull-ups ({DDxn, PORTxn}
= 0b01). The Port-Wise Pull-up Disable bits are ORed with the global Pull-up Disable bit (PUD)
from the MCUCR register. See
feature.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
PORTB7
PINB7
DDB7
R/W
R/W
N/A
R
R
7
0
R
R
7
0
7
0
7
0
7
0
7
-
-
-
PORTB6
PINB6
DDB6
R/W
R/W
N/A
R
R
R
R
6
0
6
0
6
0
6
0
6
0
6
-
-
-
PORTB5
“Configuring the Pin” on page 57
PINB5
DDB5
R/W
R/W
N/A
R
R
5
0
R
R
5
0
5
0
5
0
5
0
5
-
-
-
PORTB4
PINB4
DDB4
R/W
R/W
N/A
R
R
R
4
0
4
0
4
0
4
0
R
-
-
4
0
4
-
PORTA3
PORTB3
DDA3
PINA3
PINB3
DDB3
R/W
R/W
R/W
R/W
N/A
N/A
3
0
R
R
3
0
3
3
0
3
0
3
PORTA2
PORTB2
PINA2
DDA2
PINB2
DDB2
R/W
R/W
R/W
R/W
N/A
N/A
R
2
0
2
0
2
2
0
R
2
0
2
for more details about this
PORTA1
PORTB1
DDA1
PINA1
PINB1
DDB1
R/W
R/W
R/W
R/W
N/A
N/A
1
0
R
1
0
1
1
0
R
1
0
1
PORTA0
PORTB0
DDA0
PINA0
PINB0
DDB0
R/W
R/W
R/W
R/W
N/A
N/A
0
0
R
0
0
0
0
0
R
0
0
0
9157B–AVR–01/10
PORTB
PORTA
DDRA
DDRB
PINA
PINB