ATmega325 Atmel Corporation, ATmega325 Datasheet - Page 175
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
ATmega325
Manufacturer Part Number
ATmega325
Description
Manufacturer
Atmel Corporation
Specifications of ATmega325
Flash (kbytes)
32 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
17
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATmega325-16AI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATmega325-16AU
Manufacturer:
ATMEL
Quantity:
231
Part Number:
ATmega325-16AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATmega3250-16AI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATmega3250-16AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATmega3250P-16AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
20.9.1
2570N–AVR–05/11
Using MPCMn
nine data bits, then the ninth bit (RXB8n) is used for identifying address and data frames. When
the frame type bit (the first stop or the ninth bit) is one, the frame contains an address. When the
frame type bit is zero the frame is a data frame.
The Multi-processor Communication mode enables several slave MCUs to receive data from a
master MCU. This is done by first decoding an address frame to find out which MCU has been
addressed. If a particular slave MCU has been addressed, it will receive the following data
frames as normal, while the other slave MCUs will ignore the received frames until another
address frame is received.
For an MCU to act as a master MCU, it can use a 9-bit character frame format (UCSZ = 7). The
ninth bit (TXB8n) must be set when an address frame (TXB8n = 1) or cleared when a data frame
(TXB = 0) is being transmitted. The slave MCUs must in this case be set to use a 9-bit character
frame format.
The following procedure should be used to exchange data in Multi-processor Communication
mode:
1. All Slave MCUs are in Multi-processor Communication mode (MPCMn in UCSRnA is
2. The Master MCU sends an address frame, and all slaves receive and read this frame. In
3. Each Slave MCU reads the UDRn Register and determines if it has been selected. If so,
4. The addressed MCU will receive all data frames until a new address frame is received.
5. When the last data frame is received by the addressed MCU, the addressed MCU sets
Using any of the 5- to 8-bit character frame formats is possible, but impractical since the
Receiver must change between using n and n+1 character frame formats. This makes full-
duplex operation difficult since the Transmitter and Receiver uses the same character size set-
ting. If 5- to 8-bit character frames are used, the Transmitter must be set to use two stop bit
(USBSn = 1) since the first stop bit is used for indicating the frame type.
Do not use Read-Modify-Write instructions (SBI and CBI) to set or clear the MPCMn bit. The
MPCMn bit shares the same I/O location as the TXCn Flag and this might accidentally be
cleared when using SBI or CBI instructions.
set).
the Slave MCUs, the RXCn Flag in UCSRnA will be set as normal.
it clears the MPCMn bit in UCSRnA, otherwise it waits for the next address byte and
keeps the MPCMn setting.
The other Slave MCUs, which still have the MPCMn bit set, will ignore the data frames.
the MPCMn bit and waits for a new address frame from master. The process then
repeats from 2.
ATmega325/3250/645/6450
175