AT90USB1286 Atmel Corporation, AT90USB1286 Datasheet - Page 295
AT90USB1286
Manufacturer Part Number
AT90USB1286
Description
Manufacturer
Atmel Corporation
Specifications of AT90USB1286
Flash (kbytes)
128 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
48
Ext Interrupts
16
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Eeprom (bytes)
4096
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
10
Input Capture Channels
1
Pwm Channels
9
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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23.14 IN Pipe management
7593K–AVR–11/09
If the OUT Pipe is composed of multiple banks, this also switches to the next data bank. The
TXOUT and FIFOCON bits are automatically updated by hardware regarding the status of the
next bank.
The Pipe must be configured first.
When the Host requires data from the device, the firmware has to determine first the IN mode to
use using the INMODE bit:
The IN request generation will start when the firmware clear the PFREEZE bit.
• INMODE = 0. The INRQX register is taken in account. The Host controller will perform
• INMODE = 1. The USB controller will perform infinite IN request until the firmware freezes the
(INRQX+1) IN requests on the selected Pipe before freezing the Pipe. This mode avoids to
have extra IN requests on a Pipe.
Pipe.
Example with 1 OUT data bank
Example with 2 OUT data banks
Example with 2 OUT data banks
FIFOCON
FIFOCON
FIFOCON
TXOUT
TXOUT
TXOUT
SW
SW
SW
write data from CPU
write data from CPU
write data from CPU
BANK 0
BANK 0
BANK 0
SW
SW
SW
OUT
OUT
OUT
SW
SW
write data from CPU
write data from CPU
(bank 0)
DATA
BANK 1
BANK 1
(bank 0)
(bank 0)
DATA
DATA
ACK
HW
SW
HW
HW
ACK
ACK
SW
OUT
SW
SW
SW
OUT
write data from CPU
write data from CPU
write data from CPU
(bank 1)
DATA
AT90USB64/128
BANK 0
BANK0
BANK0
ACK
(bank 1)
DATA
SW
OUT
ACK
295
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