AT89LP4052 Atmel Corporation, AT89LP4052 Datasheet - Page 73

no-image

AT89LP4052

Manufacturer Part Number
AT89LP4052
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89LP4052

Flash (kbytes)
4 Kbytes
Max. Operating Frequency
20 MHz
Cpu
8051-1C
Max I/o Pins
15
Spi
1
Uart
1
Sram (kbytes)
0.25
Operating Voltage (vcc)
2.4 to 5.5
Timers
2
Isp
SPI
Watchdog
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89LP4052-16PI
Manufacturer:
ITT
Quantity:
10
Part Number:
AT89LP4052-16SU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
AT89LP4052-16XU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
AT89LP4052-20SI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
AT89LP4052-20SU
Manufacturer:
ATMEL
Quantity:
3 100
Part Number:
AT89LP4052-20XI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
23.5
3547J–MICRO–10/09
In-System Programming (ISP)
Table 23-3.
The AT89LP2052/LP4052 offers a serial programming interface which may be used in place of
the parallel programming interface or to program the device while in system. In this document
serial programming and In-System Programming (ISP) refer to the same interface. ISP supports
the same command set as parallel programming. However, during ISP command bytes are
entered serially over the Serial Peripheral Interface (SPI) pins. The device connections are
shown in
ming prior to entering the first ISP session. ISP itself may disable the ISP Fuse, however any
changes to the ISP fuses will not take affect until the device has been powered down and up
again. The programmer must take care not to accidentally disable the ISP Fuse as this will make
the device unprogrammable through the serial interface. Only Parallel Programming may re-
enable the fuse.
V
V
I
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
PP
PWRUP
POR
CSTP
HSTL
CLXH
XTH
XTL
DSTP
DHLD
XLDO
XLDV
XLCH
CHDZ
CHBL
WRC
ERS
BHPG
BHHl
CLRL
PWRDN
Symbol
PPH
PPL
Figure
Parameter
Programming Enable Input High Voltage
Programming Enable Input Low Voltage
Programming Enable Current
Power-on to RST High
Power-on Reset Time
CS Setup to V
High Voltage Setting time
CS Low to XTAL1 High
XTAL1 High Width
XTAL1 Low Width
Data Setup to XTAL1 High
Data Hold after XTAL1 High
XTAL1 Low to Data Out
XTAL1 Low to Data Valid
XTAL1 Low to CS High
CS High to Data Tri-state
CS High to BUSY Low
Write Cycle Time
Erase Cycle Time
BUSY High to Next Erase/Write
BUSY High to V
CS Low to RST Low
RST Low to Power Off
Parallel Flash Programming and Verification Parameters
23-21. The ISP Enable User Fuse must be enabled through Parallel Program-
PP
PP
High
Off
AT89LP2052/LP4052
11.5
Min
-0.5
100
125
100
100
10
10
10
75
50
50
20
10
2
3
1
1
Max
12.5
V
1.0
4.5
20
3
9
CC
Units
mA
ms
ms
ms
µs
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
µs
µs
µs
V
V
73

Related parts for AT89LP4052