AT89C51ID2 Atmel Corporation, AT89C51ID2 Datasheet - Page 90

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AT89C51ID2

Manufacturer Part Number
AT89C51ID2
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT89C51ID2

Flash (kbytes)
64 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
32
Spi
1
Twi (i2c)
1
Uart
1
Sram (kbytes)
2
Eeprom (bytes)
2048
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART
Watchdog
Yes

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Figure 34. Format and State in the Slave Receiver Mode
4289C–8051–11/05
Reception of the own
slave address and one or
more data bytes. All are
acknowledged.
Last data byte received
is not acknowledged.
Arbitration lost as master
and addressed as slave
Reception of the general call
address and one or more data
bytes.
Last data byte received is
not acknowledged.
Arbitration lost as master and
addressed as slave by general call
From master to slave
From slave to master
S
SLA
General Call
Data
n
W
A
70h
78h
60h
68h
A
A
A
A
Any number of data bytes and their associated
acknowledge bits
This number (contained in SSCS) corresponds
to a defined state of the 2-wire bus
Data
Data
80h
90h
A
A
Data
Data
AT89C51ID2
80h
90h
88h
98h
A
A
A
A
P or S
P or S
P or S
P or S
A0h
A0h
90

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