AT89C51ID2 Atmel Corporation, AT89C51ID2 Datasheet - Page 22
AT89C51ID2
Manufacturer Part Number
AT89C51ID2
Description
Manufacturer
Atmel Corporation
Specifications of AT89C51ID2
Flash (kbytes)
64 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
32
Spi
1
Twi (i2c)
1
Uart
1
Sram (kbytes)
2
Eeprom (bytes)
2048
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART
Watchdog
Yes
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Figure 4. Mode Switching Waveforms
22
AT89C51ID2
XTAL1
XTAL1:2
X2 bit
CPU clock
STD Mode
The X2 bit in the CKCON0 register (see Table 21) allows a switch from 12 clock periods
per instruction to 6 clock periods and vice versa. At reset, the speed is set according to
X2 bit of Hardware Security Byte (HSB). By default, Standard mode is active. Setting the
X2 bit activates the X2 feature (X2 mode).
The T0X2, T1X2, T2X2, UartX2, PcaX2, and WdX2 bits in the CKCON0 register (See
Table 21.) and SPIX2 bit in the CKCON1 register (see Table 22) allows a switch from
standard peripheral speed (12 clock periods per peripheral clock cycle) to fast periph-
eral speed (6 clock periods per peripheral clock cycle). These bits are active only in X2
mode.
F
OSC
X2 Mode
STD Mode
4289C–8051–11/05