AT89C51ID2 Atmel Corporation, AT89C51ID2 Datasheet - Page 43
AT89C51ID2
Manufacturer Part Number
AT89C51ID2
Description
Manufacturer
Atmel Corporation
Specifications of AT89C51ID2
Flash (kbytes)
64 Kbytes
Max. Operating Frequency
60 MHz
Cpu
8051-12C
Max I/o Pins
32
Spi
1
Twi (i2c)
1
Uart
1
Sram (kbytes)
2
Eeprom (bytes)
2048
Self Program Memory
API
Operating Voltage (vcc)
2.7 to 5.5
Timers
4
Isp
UART
Watchdog
Yes
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43
AT89C51ID2
•
Table 28. CCON Register
CCON - PCA Counter Control Register (D8h)
Reset Value = 00X0 0000b
Not bit addressable
The watchdog timer function is implemented in module 4 (See Figure 17).
The PCA interrupt system is shown in Figure 15.
Number
Bits 0 through 4 are the flags for the modules (bit 0 for module 0, bit 1 for module 1,
etc.) and are set by hardware when either a match or a capture occurs. These flags
also can only be cleared by software.
Bit
CF
7
7
6
5
4
3
2
1
0
Mnemonic Description
CCF4
CCF3
CCF2
CCF1
CCF0
CR
Bit
CR
CF
6
-
PCA Counter Overflow flag
Set by hardware when the counter rolls over. CF flags an interrupt if bit ECF in
CMOD is set. CF
may be set by either hardware or software but can only be cleared by software.
PCA Counter Run control bit
Must be cleared by software to turn the PCA counter off.
Set by software to turn the PCA counter on.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
PCA Module 4 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
PCA Module 3 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
PCA Module 2 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
PCA Module 1 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
PCA Module 0 interrupt flag
Must be cleared by software.
Set by hardware when a match or capture occurs.
5
-
CCF4
4
CCF3
3
CCF2
2
CCF1
1
4289C–8051–11/05
CCF0
0