AT83EB5114 Atmel Corporation, AT83EB5114 Datasheet - Page 10
AT83EB5114
Manufacturer Part Number
AT83EB5114
Description
Manufacturer
Atmel Corporation
Datasheet
1.AT83EB5114.pdf
(95 pages)
Specifications of AT83EB5114
Max. Operating Frequency
24 MHz
Cpu
8051-12C
Max I/o Pins
11
Adc Channels
6
Adc Resolution (bits)
10
Adc Speed (ksps)
50
Sram (kbytes)
0.25
Eeprom (bytes)
256
Operating Voltage (vcc)
3.0 to 3.6
Timers
4
Mask Rom (kbytes)
4
Watchdog
Yes
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Figure 3. Power-Up and Steady-state Conditions Monitored
10
Vcc
AT89/83EB5114
Vcc
Reset
Power-up
tR
tG
VPFDP
VPFDM
The POR/PFD forces the CPU into reset mode when VCC reaches a voltage condition
which is out of specification.
The thresholds and their functions are:
•
•
Glitch filtering prevents the system from RESET when short duration glitches are carried
on Vcc power-supply (See “Electrical Characteristics” on page 84.).
In case Vcc is below VPFDP, LOWVD bit in AUXR (See Table 12 on page 23) is cleared
by hardware. This bit allows the user to know if the voltage is below VPFDP.
Note: For proper reset operation V
power source). However, to improve the noise immunity, it is better to have two decou-
pling networks close to power pins (one for V
VPFDP: the Vcc has reached a minimum functional value at power-up. The circuit
leaves the RESET mode
VPFDM: the Vcc has reached a low threshold functional value for the
microcontroller. An internal RESET is set.
Steady State Condition
CCA
and V
CCA
CC
/V
must be considered together (same
SSA
pair and one for V
CC
t
4311C–8051–02/08
/V
SS
pair).
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