AT32UC3A3256AU Atmel Corporation, AT32UC3A3256AU Datasheet - Page 477
AT32UC3A3256AU
Manufacturer Part Number
AT32UC3A3256AU
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A0128AU.pdf
(2 pages)
5.AT32UC3A3128.pdf
(91 pages)
6.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A3256AU
Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
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- AT32UC3A0128 PDF datasheet
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- AT32UC3A0128 PDF datasheet #3
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- AT32UC3A3128 PDF datasheet #5
- AT32UC3A3128 PDF datasheet #6
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23.8
23.8.1
23.8.2
32072G–11/2011
Functional Description
Transfer Format
Operation
The data put on the TWD line must be 8 bits long. Data is transferred MSB first; each byte must
be followed by an acknowledgement. The number of bytes per transfer is unlimited (see
23-4).
Each transfer begins with a START condition and terminates with a STOP condition (see
23-4).
Figure 23-3.
Figure 23-4. Transfer Format
The TWIM has two modes of operation:
The master is the device which starts and stops a transfer and generates the TWCK clock.
These modes are described in the following chapters.
• A high-to-low transition on the TWD line while TWCK is high defines the START condition.
• A low-to-high transition on the TWD line while TWCK is high defines a STOP condition.
• Master transmitter mode
• Master receiver mode
TWD
TWCK
START and STOP Conditions
Start
Address
TWCK
TWD
R/W
Start
Ack
Data
Ack
Data
Stop
Ack
Stop
Figure
Figure
477
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