AT32UC3A1512AU Atmel Corporation, AT32UC3A1512AU Datasheet - Page 88
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AT32UC3A1512AU
Manufacturer Part Number
AT32UC3A1512AU
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(98 pages)
2.AT32UC3A0128.pdf
(826 pages)
3.AT32UC3A0128.pdf
(377 pages)
4.AT32UC3A0128.pdf
(33 pages)
5.AT32UC3A0128.pdf
(159 pages)
6.AT32UC3A0128AU.pdf
(2 pages)
Specifications of AT32UC3A1512AU
Flash (kbytes)
512 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
69
Ext Interrupts
69
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
1
Uart
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
9.1.2.2
32002F–03/2010
Accessing the debug features
(such as reading the register file) may require running sections of debug code on the CPU,
which can also be handled in this level. The emulator translates the communication from the
host into commands transmitted to the target over the JTAG port. If trace is enabled, trace mes-
sages are transmitted from the device on the Nexus-defined auxiliary (AUX) port. The AUX port
can be scaled to the number of output pins needed to sustain the estimated bandwidth require-
ment. The Nexus protocol defines the format of the messages and signals, the pin count options
and pinout of the debug port, and the type of connector used.
Figure 9-1.
A number of blocks handle the various debug functions specified by the Nexus standard. The
emulator communicates with registers in these blocks by commands on the JTAG port, as spec-
ified by the Nexus standard. OCD registers are typically used for configuration, control, and
status information. Trace information and debug events can also generate messages to be
transmitted on the AUX port.
Registers are indexed and are accessed through Read Register and Write Register messages
from the emulator. Alternatively, they can be accessed by the CPU through mtdr and mfdr
instructions, which gives a debug monitor in the CPU access to most of the debug features in
the OCD system, as described in
Service Access Bus (SAB)
Debug
inst
Service Access
Port (SAP)
Control
Flow
Block diagram of the OCD system (shaded) and its main connections.
TAP
Unit
control
signals
OCD
CPU
JTAG Port
Status msg
Debug
Emulator
W atchpoint
“OCD Register Access” on page
Breakpoint Unit
msg
AUX Port
Trigger
Trigger
observation
signals
CPU
Transmit Queue
CPU observation units
Data Trace
Comparators
Comparators
Program
Trace
Data
PC
Host
Trace msg
Data
Message
Branch
Trace
Ownership
Ownership
Message
Trace
Trace
Unit
98.
AVR32
OCD system
88