AT32UC3A1512AU Atmel Corporation, AT32UC3A1512AU Datasheet - Page 153
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
AT32UC3A1512AU
Manufacturer Part Number
AT32UC3A1512AU
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(98 pages)
2.AT32UC3A0128.pdf
(826 pages)
3.AT32UC3A0128.pdf
(377 pages)
4.AT32UC3A0128.pdf
(33 pages)
5.AT32UC3A0128.pdf
(159 pages)
6.AT32UC3A0128AU.pdf
(2 pages)
Specifications of AT32UC3A1512AU
Flash (kbytes)
512 Kbytes
Pin Count
100
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
69
Ext Interrupts
69
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
1
Uart
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
9.11
32002F–03/2010
OCD Register Summary
Use the index shown in the "Register index" column when accessing OCD registers by the
Nexus access mechanism (see
"mtdr/mfdr index" column when accessing OCD registers by mtdr/mfdr instructions from the
CPU (see
plied by 4.
Table 9-64.
Register
Index
0
1
2
3
4
5-6
7
8
9
10
11
12
13
14–15
16-17
18–19
20-21
22
23
24
25
26
27
28
29
30
31
32
33
Section 9.2.10 on page
mtdr/mf
dr index
0
4
8
12
16
20-24
28
32
36
40
44
48
52
56-60
64-68
72-76
80-84
88
92
96
100
104
108
112
116
120
124
128
132
OCD Register Summary
Register
Device ID (DID)
Reserved
Development Control (DC)
Reserved
Development Status (DS)
Reserved
Reserved
Reserved
Reserved
Reserved
Watchpoint Trigger (WT)
Reserved
Data Trace Control (DTC)
Data Trace Start Address (DTSA) Channel 0 to 1
Reserved
Data Trace End Address (DTEA) Channel 0 to 1
Reserved
PC Breakpoint/Watchpoint Control 0A (BWC0A)
PC Breakpoint/Watchpoint Control 0B (BWC0B)
PC Breakpoint/Watchpoint Control 1A (BWC1A)
PC Breakpoint/Watchpoint Control 1B (BWC1B)
PC Breakpoint/Watchpoint Control 2A (BWC2A)
PC Breakpoint/Watchpoint Control 2B (BWC2B)
Data Breakpoint/Watchpoint Control 3A (BWC3A)
Data Breakpoint/Watchpoint Control 3B (BWC3B)
PC Breakpoint/Watchpoint Address 0A (BWA0A)
PC Breakpoint/Watchpoint Address 0B (BWA0B)
PC Breakpoint/Watchpoint Address 1A (BWA1A)
PC Breakpoint/Watchpoint Address 1B (BWA1B)
Section 9.3.2 on page
98). These indexes are identical to the register index multi-
109).Use the index shown in the
Access
Type
R
—
R/W
—
R
—
—
—
—
—
R/W
—
R/W
R/W
—
R/W
—
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
AVR32
Page
page 100
page 104
page 106
page 125
page 136
page 136
page 136
page 123
page 123
page 123
page 123
page 123
page 123
page 124
page 124
page 122
page 122
page 122
page 122
153