BT865AKPF Conexant Systems, Inc., BT865AKPF Datasheet
BT865AKPF
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BT865AKPF Summary of contents
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder The Bt864A/865A is specifically designed for video systems requiring the generation of composite, Y/C (S-video) or RGB (SCART) video signals from 16-bit YCrCb digital video stream. Worldwide video standards are ...
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... Ordering Information Model Number Bt864AKPF Bt865AKPF © 2000, Conexant Systems, Inc. All Rights Reserved. Information in this document is provided in connection with Conexant Systems, Inc. (“Conexant”) products. These materials are provided by Conexant as a service to its customers and may be used for informational purposes only. Conexant assumes no responsibility for errors or omissions in these materials ...
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Table of Contents List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Table of Contents Teletext . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder 2 C Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Table of Contents vi YCrCb to NTSC/PAL Digital Video Encoder Conexant Bt864A/865A 100138B ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder List of Figures Figure 1-1. Bt864A/865A Pinout Diagram . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of Figures viii YCrCb to NTSC/PAL Digital Video Encoder Conexant Bt864A/865A 100138B ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder List of Tables Table 1-1. Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of Tables x YCrCb to NTSC/PAL Digital Video Encoder Conexant Bt864A/865A 100138B ...
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Circuit Description 1.1 Pin Descriptions Pin names, input/output assignments, numbers, and descriptions are listed in Table details the block diagram. Table 1-1. Pin Assignments ( Pin Name I/O Pin # CLK I 43 RESET BLANK* ...
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Circuit Description 1.1 Pin Descriptions Table 1-1. Pin Assignments ( Pin Name I/O Pin # SLAVE I 42 RGBOUT I 14 FIELD O 15 SLEEP I 39 SDA I/O 40 SCL I 41 VDD3V I 44 CVBS/B ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder Table 1-1. Pin Assignments ( Pin Name I/O Pin # COMP O 5 VAA – 4 VDD – 37, 23, 46 AGND – 51, 52 GND – 22, 36, 45 NOTE(S): ...
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Circuit Description 1.1 Pin Descriptions Figure 1-2. Detailed Block Diagram 1-4 YCrCb to NTSC/PAL Digital Video Encoder Conexant Bt864A/865A 100138B ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder 1.2 Clock Timing A clock signal with a frequency twice the pixel sampling rate must be present at the CLK pin. The device generates an internal pixel CLOCK that in slave mode is ...
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Circuit Description 1.4 HSYNC* Timing 1.4 HSYNC* Timing 1.4.1 Master Mode There are two HSYNC* timing modes in master mode; default mode and variable HSYNC* timing mode. The variable HSYNC* timing mode is enabled by setting ADJHSYNC high. This ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder Figure 1-3. HSYNC* Timing In Master Mode Reset ( Internal Pixel Clock/Counter Pixel Count Internal Horizontal Reset Default (2) HSYNC* (1) Horizontal Sync Pipeline Delay Analog Output Video Waveform NOTE(S): (1) ...
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Circuit Description 1.5 Video Timing 1.5 Video Timing The width of the analog horizontal sync pulses and the start and end of color burst are automatically calculated and inserted for each mode according to ITU-RBT.470-3 equalization pulses are generated ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder Figure 1-5. Interlaced 525-Line (PAL-M) Video Timing Analog FIELD 1 523 524 525 1 2 Analog FIELD 2 261 262 263 264 265 Analog FIELD 3 523 524 525 1 2 Analog FIELD ...
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Circuit Description 1.5 Video Timing Figure 1-6. Interlaced 625-Line (PAL– Nc) Video Timing 620 621 622 623 624 308 309 310 311 312 620 621 622 623 624 308 309 310 311 312 Burst Blanking ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder Figure 1-7. Interlaced 625-Line (PAL– Nc) Video Timing 620 621 622 623 624 308 309 310 311 312 620 621 622 623 624 308 309 310 311 312 Burst ...
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Circuit Description 1.5 Video Timing Figure 1-8. Interlaced 625-Line (PAL–N) Video Timing 620 621 622 623 624 308 309 310 311 312 620 621 622 623 624 308 309 310 311 312 Burst Blanking Intervals Burst Phase = Reference ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder Figure 1-9. Interlaced 625-Line (PAL–N) Video Timing 620 621 622 623 624 308 309 310 311 312 620 621 622 623 624 308 309 310 311 312 Burst Blanking Intervals Burst Phase = ...
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Circuit Description 1.5 Video Timing Figure 1-10. Noninterlaced 262-Line (NTSC) Video Timing 258 259 260 261 CCIR 624 line numbering convention. EVBI = 0. NOTE(S): Figure 1-11. Noninterlaced 262-Line (PAL-M) Video Timing 258 259 260 261 262 CCIR 624 ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder 1.5.1 Reset If the RESET* pin is held low during a single rising edge of CLK, the subcarrier phase is set to zero, and the horizontal and vertical counters are held to the ...
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Circuit Description 1.5 Video Timing Table 1-3. Horizontal Counter Values for Various Video Timings Equalizatio n Pulse Operating Mode Width HCN µs T NTSC CCIR601 32 2.3 7 PAL–M CCIR601 32 2.3 7 NTSC Square 29 2.3 6 PAL–M ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder 1.5.4 Slave Mode The horizontal counter is incremented on every other rising edge of CLK. A falling edge of HSYNC* resets it to one, indicating the start of a new line. The vertical ...
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Circuit Description 1.5 Video Timing 1.5.7 Burst Blanking For interlaced NTSC, color burst information is automatically disabled on scan lines 1–9 and 264–272, inclusive. (SMPTE line numbering convention.) For interlaced PAL-M color burst information is automatically disabled on scan ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder Figure 1-13. Three-Stage Chrominance Filter Figure 1-14. Three-Stage Chrominance Filter (Passband) 100138B Frequency (MHz) CLK = 27 MHz Frequency (MHz) CLK = 27 MHz Conexant 1.0 Circuit Description 1.5 Video Timing 1-19 ...
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Circuit Description 1.5 Video Timing Figure 1-15. Luminance 2X Upsampling Filter Response Figure 1-16. Luminance 2X Upsampling Filter Response (Passband) 1-20 YCrCb to NTSC/PAL Digital Video Encoder Frequency (MHz) CLK = 27 MHz Frequency (MHz) CLK = 27 MHz ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder 1.5.10 Subcarrier Phasing In order to maintain correct SC-H phasing, the subcarrier phase is set to zero on the falling edge of HSYNC* associated with VSYNC* every four (NTSC) or eight (PAL) fields, ...
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Circuit Description 1.6 Power Saving Modes 1.6 Power Saving Modes In SLEEP power-down mode (SLEEP pin set to 1), all analog and digital circuitry is disabled, and total device current consumption approaches 0 mA. Register states are preserved, but ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder 1.7 Pixel Input Ranges and Colorspace Conversion 1.7.1 YC Inputs (4:2:2 YCrCb) Y has a nominal range of 16–235; Cb and Cr have a nominal range of 16–240, with 128 equal to zero. ...
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Circuit Description 1.7 Pixel Input Ranges and Colorspace Conversion Figure 1-17. DAC Sinx/x Response Figure 1-18. DAC Sinx/x Response (Passband) 1-24 YCrCb to NTSC/PAL Digital Video Encoder Frequency (MHz) CLK = 27 MHz Frequency (MHz) CLK = 27 MHz ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder 1.8 Closed Captioning The Bt864A/865A encodes NTSC/PAL–M closed captioning on scan line 21 and NTSC/PAL–M extended data services on scan line 284. Four 8-bit registers (CCF1B1, CCF1B2, CCF2B1, and CCF2B2) provide the data ...
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Circuit Description 1.9 Teletext 1.9 Teletext Teletext encoding is accomplished via a two-wire interface, TTXDAT and TTXREQ, and internal registers that are programmed through the I Teletext encoding in the Bt864A/865A conforms to Teletext B for 625/50 television systems. ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder Figure 1-19. Teletext Timing for Bt864A/865A Encoder TTXREQ TTXDAT (6) CVBS/B CVBS/G Y/CVBS Internal Horizontal Reset Internal Clock (CLK) (9) Counter NOTE(S): (1) Placement of rising ...
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Circuit Description 1.9 Teletext 1.9.1 CCIR601 Operation (13.5 MHz pixel rate) The bit duration follows this pattern which repeats every 37 teletext bits. Each teletext data bit is carried by four CLKs except bits 10, 19, 28, and 37 ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder 1.9.4 Teletext Clock Output The Bt864A/865A can output the teletext clock from the TTXREQ pin by setting TXRM = 1. In this mode, this teletext clock would only be output on active teletext ...
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Circuit Description 1.11 Anticopy Process (Bt865A Only) 1.11 Anticopy Process (Bt865A Only) The anticopy process contained within the Bt865A is implemented according to the Macrovision version 7 specification developed by Macrovision Corporation in Sunnyvale, California. All luminance, chrominance, and ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder 1.13 SCART/PeriTV Support RGBOUT mode can be enabled by setting the RGBOUT pin to a logical one setting register bit RGBO. The Bt864A/865A can generate analog RGB video signals to interface ...
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Circuit Description 1.15 Analog Outputs 1.15.1 Luminance or CVBS (Y/CVBS) Output Digital luminance information drives the 10-bit D/A converter that generates the analog Y video output can also provide CVBS for SCART/PeriTV synchronization when RGBOUT is enabled. 1.15.2 Chrominance ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder Figure 1-22. Y (Luminance) Video Output Waveform SETUPDIS = 26.68 1.000 100 IRE 9.07 0.340 7.60 0.285 40 IRE 0.00 0.000 Typical with 37.5 ¾ load, nominal RSET. SMPTE 170 ...
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Circuit Description 1.15 Analog Outputs Figure 1-23. Y (Luminance) Video Output Waveform SETUPDIS = 26.68 1.000 8.0 0.300 0.00 0.000 Typical with 37.5 ¾ load and nominal RSET. ITU-RBT.470-3 levels are assumed. 100% saturation (100/0/100/0) NOTE(S): ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder Figure 1-24. C (Chrominance) Video Output Waveform SETUPDIS = 28.21 1.058 20.88 0.783 20 IRE 17.07 0.640 20 IRE 13.27 0.498 5.93 0.222 Typical with 37.5 ¾ load, nominal RSET, ...
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Circuit Description 1.15 Analog Outputs Figure 1-25. C (Chrominance) Video Output Waveform SETUPDIS = 28.88 1.083 21.08 0.791 17.07 0.640 13.07 0.490 5.27 0.198 Typical with 37.5 ¾ load, nominal RSET, and chroma on. ITU-RBT.470-3 levels ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder Figure 1-26. CVBS (Composite) Video Output Waveform SETUPDIS = 32.55 1.221 34 IRE 26.68 1.000 100 IRE 11.41 0.423 9.07 0.340 20 IRE 7.60 0.285 20 IRE 3.80 0.143 40 ...
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Circuit Description 1.15 Analog Outputs Figure 1-27. CVBS (Composite) Video Output Waveform SETUPDIS = 32.88 1.233 26.68 1.000 12.01 0.450 8.00 0.300 4.00 0.150 1.80 0.068 0.00 0.000 Typical with 37.5 ¾ load, nominal RSET, and ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder Table 1-14. RGB Output Table (RGBOUT = 1) SETUPDIS = 1 Description Iout (mA) White 18.68 Black 0 Blank 0 NOTE(S): (1) BLANK occurs by external BLANK* pin or internally generated BLANK. 2. ...
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Circuit Description 1.15 Analog Outputs 1-40 YCrCb to NTSC/PAL Digital Video Encoder Conexant Bt864A/865A 100138B ...
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Internal Registers A read-back bit map is given in Table detailed programming information follow the bit map. All registers are write-only and are set to zero following a software reset. A software reset is always performed at power-up; ...
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Internal Registers 2.3 Writing Addresses 2.3 Writing Addresses Following a start condition, writing to slave address 0x8A initiates access to subaddresses. Alternative slave address 0x88 must be written if the ALTADDR pin is high. 2.4 Reading Information Following a ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder Table 2-2. Register Bit Map ( 7-Bit 8-Bit D7 Subaddr Subaddr 0x64 0xC8 HSYNCR[7:0] 0x65 0xCA SYNCDLY FIELDI 0x66 0xCC SETMODE SETUPDIS 0x67 0xCE ESTATUS RGBO 0x68 0xD0 Reserved (1) 0x69 ...
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Internal Registers 2.5 Programming Detail 2.5 Programming Detail EWSF1 0 = Disable WSS/CGMS encoding in field Enable WSS/CGMS encoding in field 1 (line 20). EWSF2 0 = Disable WSS/CGMS encoding in field Enable ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder CBSWAP 0 = Normal pixel sequence The Cb and Cr pixels can be swapped at the input of the pixel port. Refer to the pixel sequence section for more information. PORCH ...
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Internal Registers 2.5 Programming Detail NONINTL 0 = Interlaced operation Noninterlaced operation. SQUARE 0 = CCIR601 operation Square pixel operation. ESTATUS The I C read-back information contains the version number ...
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PC Board Considerations The layout should be optimized for lowest noise on the power and ground planes by providing good decoupling. The trace length between groups of VAA and GND pins should be as short as possible to minimize ...
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PC Board Considerations 3.2 Power and Ground Planes Figure 3-1. Example Power Plane Layout Figure 3-2. Typical Connection Diagram and Parts List VDD VAA Bt864A/865A C6 C2 COMP VBIAS C8 VREF C7 AGND GND RSET FSADJUST CVBS/G CVBS/B Y/CVBS ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder Location Description C1–C8 0.1 µF Ceramic Capacitor C9 47 µF Capacitor L1 Ferrite Bead - Surface Mount RSET 1% Metal Film Resistor (75 ¾) TRAP Ceramic Resonator Schottky Diodes RLOAD 1% Metal Film ...
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PC Board Considerations 3.3 Decoupling 3.3 Decoupling 3.3.1 Device Decoupling For optimum performance, all capacitors should be located as close as possible to the device, and the shortest possible leads (consistent with reliable operation) should be used to reduce ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder 3.4 Signal Interconnect 3.4.1 Digital Signal Interconnect The digital inputs to the Bt864A/865A should be isolated as much as possible from the analog outputs and other analog circuitry. Also, these input signals should ...
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PC Board Considerations 3.5 Applications Information 3.5 Applications Information 3.5.1 ESD and Latchup Considerations Correct ESD-sensitive handling procedures are required to prevent device damage. Device damage can produce symptoms of catastrophic failure or erratic device behavior with leaky inputs. ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder 3.5.3 Mutual Inductance Concerns The designer should prevent a situation where signals from other devices next to the encoder cause the crystal to generate faulty clocks. The Conexant encoder and any associated crystal ...
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PC Board Considerations 3.5 Applications Information 3.5.5 Filtering RF Modulator Connection The Bt864A/865A internal upsampling filter alleviates external filtering requirements by moving significant sampling alias components above 19 MHz and reducing the sinx/x aperture loss up to the filter’s ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder 3.5.6 Luminance Delay on CVBS/B Postfiltering of the video signal can introduce a variable delay between the lower frequency luminance components and the higher frequency chrominance subcarrier components. The group delay distortion is ...
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PC Board Considerations 2 3 Programming 3.6 I 3.6.1 Data Transfer on the This provides farther information on I relationship between SDA and SCL to be used when programming the I the bus ...
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Parametric Information 4.1 DC Electrical Parameters Table 4-1. Recommended Operating Conditions Parameter Power Supply 5 V 3.3 V Ambient Operating Temperature DAC Output Load Nominal RSET Table 4-2. Absolute Maximum Ratings Parameter VAA and VDD (measured to GND) (1) ...
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Parametric Information 4.1 DC Electrical Parameters Table 4-3. DC Characteristics (VDD = 5 V) Parameter Video D/A Resolution Output Current-DAC Code 1023 (Iout FS) Output Voltage-DAC Code 1023 Video Level Error (Nominal Resistors) Output Capacitance Digital Inputs (Except those ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder 4.2 AC Electrical Parameters Table 4-4. AC Characteristics (VDD = 5 V, VAA = Parameter (3) Hue Accuracy (3) Color Amplitude Accuracy (4) Chroma AM/PM Noise (3) Differential ...
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Parametric Information 4.2 AC Electrical Parameters Table 4-4. AC Characteristics (VDD = 5 V, VAA = Parameter (5) Control Output Delay Time 5.0 V 3.3 V (5) Control Output Hold Time CLK Frequency CLK ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder Figure 4-1. YCrCb Video Input and Output Timing CLK P[7:0], Y[7:0] 16-bit mode, BLANK*, HSYNC*, VSYNC* P[7:0] 8-bit mode, TTXDAT TTXREQ HSYNC*, VSYNC* FIELD (Output) CVBS/B, CVBS/G, Y/CVBS, C/R 100138B ...
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Parametric Information 4.3 Package Drawing 4.3 Package Drawing Figure 4-2. 52-Pin PQFP 4-6 YCrCb to NTSC/PAL Digital Video Encoder Conexant Bt864A/865A 100138B ...
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Bt864A/865A YCrCb to NTSC/PAL Digital Video Encoder 4.4 Revision History Revision A New Datasheet. 100138B Change from Previous Revision Conexant 4.0 Parametric Information 4.4 Revision History 4-7 ...
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Parametric Information 4.4 Revision History 4-8 YCrCb to NTSC/PAL Digital Video Encoder Conexant Bt864A/865A 100138B ...
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... America) Fax: (949) 483-6996 (International) Printed in USA Europe – Israel/Greece Phone: +972 9 9524000 World Headquarters Fax: Conexant Systems, Inc. 4311 Jamboree Road Europe South – France Phone: + Newport Beach, CA Fax: 92660-3007 Phone: (949) 483-4600 Europe Mediterranean – Italy ...