X25160 Xicor, X25160 Datasheet

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X25160

Manufacturer Part Number
X25160
Description
Manufacturer
Xicor
Datasheets

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
X25160
Manufacturer:
XILINX
0
Part Number:
X25160
Manufacturer:
XICOR
Quantity:
20 000
Part Number:
X25160-F
Manufacturer:
XICOR
Quantity:
1 831
Part Number:
X25160E
Manufacturer:
XILINX
0
Part Number:
X25160G
Manufacturer:
XICOR
Quantity:
20 000
Part Number:
X25160P
Manufacturer:
XICOR
Quantity:
20 000
Part Number:
X25160ST1
Manufacturer:
XICOR
Quantity:
20 000
Recommended System Management
Alternative: X5163
16K
FEATURES
• 2MHz clock rate
• SPI modes (0,0 & 1,1)
• 2K X 8 bits
• Low power CMOS
• 2.7V To 5.5V power supply
• Block lock protection
• Built-in inadvertent write protection
• Self-timed write cycle
• High reliability
• 8-lead PDlP package
• 8-lead SOIC package
BLOCK DIAGRAM
Direct Write
REV 1.2 11/28/00
—32-byte page mode
—<1µA standby current
—<5mA active current
—Protect 1/4, 1/2 or all of EEPROM array
—Power-up/power-down protection circuitry
—Write enable latch
—Write protect pin
—5ms write cycle time (typical)
—Endurance: 1,000,000 cycles
—Data retention: 100 years
—ESD protection: 2000V on all pins
and Block Lock
HOLD
SCK
SO
CS
WP
SI
SPI Serial EEPROM With Block Lock
Protection is a trademark of Xicor, Inc.
Command
Register
Decode
Control
Control
Timing
Status
Logic
Logic
Write
and
and
Protect
Logic
Write
www.xicor.com
X25160
DESCRIPTION
The X25160 is a CMOS 16384-bit serial EEPROM,
internally organized as 2K x 8. The X25160 features a
Serial Peripheral Interface (SPI) and software proto-
col, allowing operation on a simple three-wire bus. The
bus signals are a clock input (SCK) plus separate data
in (SI) and data out (SO) lines. Access to the device is
controlled through a chip select (CS) input, allowing
any number of devices to share the same bus.
The X25160 also features two additional inputs that
provide the end user with added flexibility. By assert-
ing the HOLD input, the X25160 will ignore transitions
on its inputs, thus allowing the host to service higher
priority interrupts. The WP input can be used as a
hardwire input to the X25160 disabling all write
attempts to the status register, thus providing a mech-
anism for limiting end user capability of altering 0, 1/4,
1/2 or all of the memory.
The X25160 utilizes Xicor’s proprietary Direct Write
cell, providing a minimum endurance of 1,000,000
cycles and a minimum data retention of 100 years.
X Decode
Logic
32
Characteristics subject to change without notice.
Protection
16
16
32
Data Register
32 X 256
Y Decode
2K Byte
16 X 256
16 X 256
Array
8
2K x 8 Bit
1 of 14

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