X25160 Xicor, X25160 Datasheet

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X25160

Manufacturer Part Number
X25160
Description
Manufacturer
Xicor
Datasheets

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Part Number
Manufacturer
Quantity
Price
Part Number:
X25160
Manufacturer:
XILINX
0
Part Number:
X25160
Manufacturer:
XICOR
Quantity:
20 000
Part Number:
X25160-F
Manufacturer:
XICOR
Quantity:
1 831
Part Number:
X25160E
Manufacturer:
XILINX
0
Part Number:
X25160G
Manufacturer:
XICOR
Quantity:
20 000
Part Number:
X25160P
Manufacturer:
XICOR
Quantity:
20 000
Part Number:
X25160ST1
Manufacturer:
XICOR
Quantity:
20 000
X25160
16K
FEATURES
• 2MHz Clock Rate
• SPI Modes (0,0 & 1,1)
• 2K X 8 Bits
• Low Power CMOS
• 2.7V To 5.5V Power Supply
• Block Lock Protection
• Built-in Inadvertent Write Protection
• Self-Timed Write Cycle
• High Reliability
• 8-Lead PDlP Package
• 8-Lead SOIC Package
• 14-Lead TSSOP Package
FUNCTIONAL DIAGRAM
Direct Write™ and Block Lock™ Protection is a trademark of Xicor, Inc.
©Xicor, Inc. 1994, 1995, 1996 Patents Pending
3064-3.9 6/11/96 T4/C1/D0 NS
— 32 Byte Page Mode
— <1 A Standby Current
— <5mA Active Current
— Protect 1/4, 1/2 or all of E
— Power-Up/Power-Down protection circuitry
— Write Enable Latch
— Write Protect Pin
— 5ms Write Cycle Time (Typical)
— Endurance: 100,000 cycles
— Data Retention: 100 Years
— ESD protection: 2000V on all pins
A V A I L A B L E
A
PPLICATION
HOLD
SCK
SO
WP
CS
SI
AN61
SPI Serial E
N
OTE
REGISTER
COMMAND
CONTROL
CONTROL
DECODE
STATUS
TIMING
WRITE
LOGIC
LOGIC
AND
AND
2
PROM Array
2
PROM With Block Lock
PROTECT
WRITE
LOGIC
X25160
1
DESCRIPTION
The X25160 is a CMOS 16384-bit serial E
internally organized as 2K x 8. The X25160 features a
Serial Peripheral Interface (SPI) and software protocol
allowing operation on a simple three-wire bus. The bus
signals are a clock input (SCK) plus separate data in (SI)
and data out (SO) lines. Access to the device is con-
trolled through a chip select (CS) input, allowing any
number of devices to share the same bus.
The X25160 also features two additional inputs that
provide the end user with added flexibility. By asserting
the HOLD input, the X25160 will ignore transitions on its
inputs, thus allowing the host to service higher priority
interrupts. The WP input can be used as a hardwire input
to the X25160 disabling all write attempts to the status
register, thus providing a mechanism for limiting end
user capability of altering 0, 1/4, 1/2 or all of the memory.
The X25160 utilizes Xicor’s proprietary Direct Write™
cell, providing a minimum endurance of 100,000 cycles
and a minimum data retention of 100 years.
X DECODE
LOGIC
TM
32
16
16
Protection
32
DATA REGISTER
Characteristics subject to change without notice
Y DECODE
32 X 256
2K BYTE
16 X 256
16 X 256
3064 ILL F01
ARRAY
8
2K x 8 Bit
2
PROM,

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