MCM63R836AFC3.7 Freescale Semiconductor, Inc, MCM63R836AFC3.7 Datasheet
MCM63R836AFC3.7
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MCM63R836AFC3.7 Summary of contents
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... Freescale Semiconductor, Inc. MOTOROLA SEMICONDUCTOR TECHNICAL DATA 8M Late Write HSTL The MCM63R836A/918A is an 8M–bit synchronous late write fast static RAM designed to provide high performance in secondary cache and ATM switch, Telecom, and other high speed memory applications. The MCM63R918A (organized as 512K words by 18 bits) and the MCM63R836A (organized as 256K words by 36 bits) are fabricated in Motorola’ ...
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... Freescale Semiconductor, Inc. ADDRESS SA REGISTERS SW SW REGISTERS SBx REGISTERS MCM63R836A DDQ DQc DQc DQc DQc DDQ DQc DQc DQc SBc ...
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... Freescale Semiconductor, Inc. MCM63R836A PIN DESCRIPTIONS Pin Locations 4K 4L (a) 6K, 7K, 6L, 7L, 6M, 6N, 7N, 6P, 7P (b) 6D, 7D, 6E, 7E, 6F, 6G, 7G, 6H, 7H (c) 1D, 2D, 1E, 2E, 2F, 1G, 2G, 1H, 2H (d) 1K, 2K, 1L, 2L, 2M, 1N, 2N, 1P 2A, 3A, 5A, 6A, 3B, 5B, 6B, 2C, 3C, 5C, 6C, 4N, 4P, 2R, 6R, 3T, 4T, 5T 5L, 5G, 3G, 3L (a), (b), (c), (d) ...
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... Freescale Semiconductor, Inc. MCM63R918A PIN DESCRIPTIONS Pin Locations 4K 4L (a) 6D, 7E, 6F, 7G, 6H, 7K, 6L, 6N, 7P (b) 1D, 2E, 2G, 1H, 2K, 1L, 2M, 1N 2A, 3A, 5A, 6A, 3B, 5B, 6B, 2C, 3C, 5C, 6C, 4N, 4P, 2R, 6R, 2T, 3T, 5T, 6T 5L, 3G (a), ( 4C, 2J, 4J, 6J, 4R, 5R 1A, 7A, 1F, 7F, 1J, 7J, 1M, 7M, 1U, 7U ...
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... Freescale Semiconductor, Inc. ABSOLUTE MAXIMUM RATINGS (Voltages Referenced See Note) Rating Core Supply Voltage Output Supply Voltage Voltage On Any Pin Other Than JTAG Voltage On Any JTAG Pin Input Current (per I/O) Output Current (per I/O) Operating Temperature Temperature Under Bias Storage Temperature NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded ...
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... Freescale Semiconductor, Inc. DC OPERATING CONDITIONS AND CHARACTERISTICS (2.375 V RECOMMENDED OPERATING CONDITIONS Parameter Core Power Supply Voltage Output Driver Supply Voltage AC Supply Current x36 (Device Selected, x18 All Outputs Open, Freq = Max Max, V DDQ = Max). Includes Supply Currents for Quiescent Active Power Supply Current (Device Selected, All Outputs Open, Freq = Max, V DDQ = Max) ...
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... Freescale Semiconductor, Inc. DC OUTPUT BUFFER CHARACTERISTICS — PROGRAMMABLE IMPEDANCE PUSH–PULL OUTPUT BUFFER MODE (2.375 3 (out) (RQ)) (See Notes 1 and 2) Parameter Output Logic Low Output Logic High Light Load Output Logic Low Light Load Output Logic High ...
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... Freescale Semiconductor, Inc. AC OPERATING CONDITIONS AND CHARACTERISTICS (2.375 V Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input Rise/Fall Time . . . . . . . . . . . . . . . . . . . . . . Input Timing Measurement Reference Level Output Timing Reference Level . . . . . . . . . . . . . . . . . . . . . . . . . READ/WRITE CYCLE TIMING (See Note 1) Parameter Cycle Time Clock High Pulse Width Clock Low Pulse Width Clock High to Output Low–Z ...
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... Freescale Semiconductor, Inc. 0. ref DEVICE 50 UNDER TEST 250 ZQ 16 INPUT CHARACTERISTICS (See Note 1) Parameter AC Input Logic High (See Figure 4) AC Input Logic Low (See Figures 2 and 4) Input Reference Peak–to–Peak AC Voltage Clock Input Differential Voltage NOTES: 1. Inputs may overshoot to 3.3 V for up to 35% t KHKH or 1.0 ns, whichever is smaller, and 3.8 V instantaneous peak overshoot. See Figure 2. ...
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... Freescale Semiconductor, Inc. V DDQ the Common Mode Input Voltage, equals V TR – [(V TR – )/2]. Figure 3. Differential Inputs/Common Mode Input Voltage V DDQ V IH (ac) V ref V IL (ac For More Information On This Product, MCM63R836A MCM63R918A –1.0 V – ...
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... Freescale Semiconductor, Inc. REGISTER/REGISTER READ–WRITE–READ CYCLES t KHKH CK t AVKH t KHAX SVKH SS SW SBx KHQV DQx Q–1 For More Information On This Product, MOTOROLA FAST SRAM t KHKL t KLKH KHSX t WVKH t KHWX t KHQZ t KHQX1 t KHQX t KHQX to: www ...
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... Freescale Semiconductor, Inc. É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É É ...
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... Freescale Semiconductor, Inc. FUNCTIONAL OPERATION READ AND WRITE OPERATIONS All control signals are registered on the rising edge of the CK clock. These signals must meet the setup and hold times shown in the AC Characteristics table. On the rising edge of the following clock, read data is clocked into the output regis- ter and available at the outputs at t KHQV ...
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... Freescale Semiconductor, Inc. SLEEP MODE This device is equipped with an optional sleep or low power mode. The sleep mode pin is asynchronous and active high. During normal operation, the ZZ pin is pulled low. When ZZ is pulled high, the chip will enter sleep mode where the device will meet lowest possible power conditions. The Sleep Mode Timing diagram shows the modes of operation: Normal Operation, No Read/Write Allowed, and Sleep Mode ...
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... Freescale Semiconductor, Inc. TAP AC OPERATING CONDITIONS AND CHARACTERISTICS (2.375 V Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input Rise/Fall Time . . . . . . . . . . . . . . . . . . . . . . Input Timing Measurement Reference Level Output Timing Reference Level . . . . . . . . . . . . . . . . . . . . . . . . . . TAP CONTROLLER TIMING Parameter Cycle Time Clock High Time Clock Low Time TMS Setup TMS Hold TDI Valid to TCK High TCK High to TDI Don’ ...
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... Freescale Semiconductor, Inc. TEST ACCESS PORT PINS TCK — TEST CLOCK (INPUT) Clocks all TAP events. All inputs are captured on the rising edge of TCK and all outputs propagate from the falling edge of TCK. TMS — TEST MODE SELECT (INPUT) The TMS input is sampled on the rising edge of TCK. This is the command input for the TAP controller state machine ...
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... Freescale Semiconductor, Inc. MCM63R836A Bump/Bit Scan Order Bit Signal g Bump p Bit No. Name ID No DQa DQa DQa DQa DQa DQa DQa DQa 6K 49 ...
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... Freescale Semiconductor, Inc. TAP CONTROLLER INSTRUCTION SET OVERVIEW There are two classes of instructions defined in the IEEE Standard 1149.1–1990; the standard (public) instructions and device specific (private) instructions. Some public instructions, are mandatory for IEEE 1149.1 compliance. Optional public instructions must be implemented in pre- scribed ways ...
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... Freescale Semiconductor, Inc. STANDARD (PUBLIC) INSTRUCTION CODES Instruction Code* EXTEST 000 Captures I/O ring contents. Places the boundary scan register between TDI and TDO. Forces all DQ pins to High–Z state. NOT IEEE 1149.1 COMPLIANT. IDCODE 001** Preloads ID register and places it between TDI and TDO. Does not affect RAM operation. ...
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... BOTTOM VIEW For More Information On This Product, MCM63R836A MCM63R918A 20 ORDERING INFORMATION (Order by Full Part Number) 63R836A MCM 63R918A MCM63R918AFC3.0 MCM63R836AFC3.0R MCM63R918AFC3.3 MCM63R836AFC3.3R MCM63R918AFC3.7 MCM63R836AFC3.7R MCM63R918AFC4.0 MCM63R836AFC4.0R PACKAGE DIMENSIONS FC PACKAGE BUMP PBGA CASE 999D–01 0.2 B 0.2 A 0.25 A SEATING PLANE 0. ...
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... Freescale Semiconductor, Inc. Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “ ...