CY2275APVC-12 Cypress Semiconductor Corporation., CY2275APVC-12 Datasheet
CY2275APVC-12
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CY2275APVC-12 Summary of contents
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Pentium®/II Clock Synthesizer/Driver for Desktop PCs with Features • Mixed 2.5V and 3.3V operation • Clock solution to meet requirements of Pentium® and Pentium® II motherboards — Four CPU clocks at 2.5V — twelve 3.3V SDRAM clocks — ...
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Pin Summary Name Pins V 6, 14, 19, 30, 36 DDQ3 V 48 DDQ2 V 42 DDCPU 16, 22, 27, 33, SS 39, 45 [2] XTALIN 4 [2] XTALOUT 5 SDRAM7/ 28 PCI_STOP SDRAM6/ ...
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Power Management Logic - Active when MODE pin is held ‘LOW’ CPU_STOP PCI_STOP PWR_DWN Serial Configuration Map • The Serial bits will be read by ...
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Byte 1: CPU Active/Inactive Register (1 = Active Inactive), Default = Active Bit Pin # Description Bit 7 N/A (Reserved) drive to ‘0’ Bit 6 N/A (Reserved) drive to ‘0’ Bit 5 N/A (Reserved) drive to ‘0’ Bit ...
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Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) Supply Voltage ..................................................–0.5 to +7.0V Input Voltage .............................................. –0. [4] Operating Conditions Parameter Analog and Digital Supply Voltage DD ...
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Switching Characteristics Parameter Output Description t All Output Duty Cycle 1 t CPUCLK CPU Clock HIGH Time 1C t PCICLK PCI Clock HIGH Time 1C t CPUCLK CPU Clock LOW Time 1D t PCICLK PCI Clock LOW Time 1D ...
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Timing Requirement for the I Parameter t SCLK Clock Frequency 10 t Time the bus must be free before a new transmission can start 11 t Hold time start condition. After this period the first clock pulse is generated. ...
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Switching Waveforms (continued) CPU-SDRAM Clock Skew CPUCLK SDRAM t 7 CPU-PCI Clock Skew CPUCLK PCICLK t 6 [8, 9] CPU_STOP CPUCLK (Internal) PCICLK (Internal) PCICLK (Free-Running) CPU_STOP CPUCLK (External) [10, 11] PCI_STOP CPUCLK (Internal) PCICLK (Internal) PCICLK (Free-Running) PCI_STOP PCICLK ...
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Switching Waveforms (continued) PWR_DOWN CPUCLK (Internal) PCICLK (Internal) PWR_DWN# CPUCLK (External) PCICLK (External) VCO Crystal Shaded section on the VCO and Crystal waveforms indicates that the VCO and crystal oscillator are active, and there is a valid clock. 2 Timing ...
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Application Information Clock traces must be terminated with either series or parallel termination, as they are normally done. Application Circuit Summary • A parallel-resonant crystal should be used as the reference to the clock generator. The operating frequency and C ...
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... Test Circuit Note: All capacitors should be placed as close to each pin as possible. Ordering Information Package Ordering Code Name CY2275APVC–12 O48 Document #: 38–00613 D V DDQ3 1 48 0 0 0 0 OUTPUTS C LOAD Operating Package Type ...
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Package Diagram © Cypress Semiconductor Corporation, 1998. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does ...