cy2275a Cypress Semiconductor Corporation., cy2275a Datasheet
cy2275a
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cy2275a Summary of contents
Page 1
... Functional Description The CY2275A is a Clock Synthesizer/Driver for a Pentium and Pentium II-based PCs using an Intel 82440LX or similar core-logic chipset. The CY2275A outputs four CPU clocks at 2.5V. There are sev- en PCI clocks, running at one half the CPU clock frequency. Logic Block Diagram XTALIN 14 ...
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... Mode Select pin for enabling power management features = 18 pF. LOAD PCICLK[0:5] REF0 PCICLK_F IOAPIC[0:1] Hi-Z Hi-Z 33.33 MHz 14.318 MHz CPU and PCI Clock Driver Strengths • Matched impedances on both rising and falling edges on the output drivers (MHz) PPM • Output impedance: 25 –195 2 CY2275A (typical) measured at 1.5V. ...
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... A1 A0 R/W Bit ---- Outputs PCI, PCI_F SDRAM Ref IOAPIC Hi-Z Hi-Z Hi-Z Hi-Z TCLK/4 TCLK/2 TCLK TCLK 3 CY2275A Other Clocks Osc. PLLs Stopped Off Off Running Running Running Running Running Running Running Running Running Running Running Running Description (Reserved) drive to ‘0’ (Reserved) drive to ‘0’ ...
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... Not used - drive to ‘0’ Bit 6 N/A Not used - drive to ‘0’ Bit 5 N/A Not used - drive to ‘0’ Bit 4 N/A Not used - drive to ‘0’ Bit 3 17 SDRAM11 Bit 2 18 SDRAM10 Bit 1 20 SDRAM9 Bit 0 21 SDRAM8 Byte 6: Reserved, for future use 4 CY2275A ...
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... Three-state V = 3.465V Loaded Outputs CPU clocks = 66.67 MHz V = 3.465V Unloaded Outputs Current draw in power-down state 5 CY2275A pins tied together) DD Min. Max. Unit 3.135 3.465 V 2.375 2.9 V 2.375 2 30 14.318 14 ...
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... Measured at 1.25V for 2.5V clocks, and at 1.5V for 3.3V clocks Measured at 1.25V for 2.5V clocks, and at 1.5V for 3.3V clocks Measured at 1.25V for 2.5V clocks, and at 1.5V for 3.3V clocks Measured at 1.5V CPU, PCI, and SDRAM clock stabiliza- tion from power-up = 2.5V, CPUCLK duty cycle is measured at 1.25V. DDCPU 6 CY2275A Min. Typ. Max. Unit 2.5V 5 ...
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... CPUCLK Outputs HIGH/LOW Time t 1C OUTPUT All Outputs Rise/Fall Time OUTPUT CPU-CPU Clock Skew CPUCLK CPUCLK Bus Description CY2275A Min. Max. Unit 0 100 kHz 250 300 ns 4.0 s ...
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... PCICLK (Free-Running) PCI_STOP PCICLK (External) Notes: 8. CPUCLK on and CPUCLK off latency CPUCLK cycles. 9. CPU_STOP may be applied asynchronously synchronized internally. 10. PCICLK on and PCICLK off latency is 1 rising edge of the external PCICLK. 11. PCI_STOP may be applied asynchronously synchronized internally. 8 CY2275A ...
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... Shaded section on the VCO and Crystal waveforms indicates that the VCO and crystal oscillator are active, and there is a valid clock. 2 Timing Requirements for the I C Bus SDA t 11 SCL CY2275A ...
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... If a Ferrite Bead is used F–22 F tantalum bypass capacitor should be placed close to the Ferrite Bead. This capacitor prevents power supply droop during current surges. is the loaded characteristic impedance trace from the clock generator V island. Ensure that the Ferrite Bead offers CY2275A of LOAD is the series terminating series ...
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... Note: All capacitors should be placed as close to each pin as possible. Ordering Information Package Ordering Code Name CY2275APVC–12 O48 Document #: 38–00613 D V DDQ3 1 48 0 0 0 0 OUTPUTS C LOAD Operating Package Type Range 48-Pin SSOP Commercial 11 CY2275A V DDQ2 V DDCPU ...
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... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 48-Lead Shrunk Small Outline Package O48 CY2275A 51-85061-B ...