MAX9888EWY+T Maxim Integrated Products, MAX9888EWY+T Datasheet - Page 77

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MAX9888EWY+T

Manufacturer Part Number
MAX9888EWY+T
Description
IC CODEC AUDIO FLEXSOUND 63WLP
Manufacturer
Maxim Integrated Products
Series
DirectDrive®, FLEXSOUND™r
Type
Class Dr
Datasheet

Specifications of MAX9888EWY+T

Output Type
3-Channel with Stereo Headphones
Max Output Power X Channels @ Load
1.37W x 2 @ 8 Ohm; 40mW x 2 @ 16 Ohm
Voltage - Supply
2.8 V ~ 5.5 V
Features
Depop, Differential Inputs, I²S, Microphone, Mute, Shutdown
Mounting Type
Surface Mount
Package / Case
63-WLP
For Use With
MAX9888EVKIT+ - KIT EVALUATION FOR MAX9888
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 11. Clock Control Registers (continued)
REGISTER
0x12/0x1A
0x13/0x1B
0x11
BIT
3
2
1
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
NI1[0]/NI2[0]
PLL1/PLL2
FREQ1
NAME
NI1/
NI2
Exact Integer Mode
Overrides PLL1 and NI1 and configures a specific PCLK to LRCLK ratio.
PLL Mode Enable (Slave Mode Only)
PLL1/PLL2 enables a digital PLL that locks on to the externally supplied LRCLK
frequency and automatically sets the LRCLK divider (NI1/NI2).
0 = Disabled
1 = Enabled
Normal Mode LRCLK Divider
When PLL1/PLL2 = 0, the frequency of LRCLK is determined by NI1/NI2. See Table 12
for common NI values.
f
f
Rapid Lock Mode
Program NI1/NI2 to the nearest valid ratio and set NI1[0]/NI2[0] when PLL1/PLL2 = 1
to enable rapid lock mode. Normally, the PLL automatically calculates and dynamically
adjusts NI1/NI2. When rapid lock mode is properly configured, the PLL starting point is
much closer to the correct value, thus speeding up lock time. Wait one LRCLK period
after programming NI1/NI2 before setting PLL1/PLL2 = 1.
LRCLK
PCLK
48kHz < LRCLK P 96kHz
8kHz P LRCLK P 48kHz
SAMPLE RATE
VALUE
with FLEXSOUND Technology
= Prescaled MCLK frequency (PCLK)
= LRCLK frequency
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
SAMPLE RATE
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Disabled
Stereo Audio CODEC
DESCRIPTION
DHF1/DHF2
0
1
VALUE
0xA
0xB
0xC
0xD
0x8
0x9
0xE
0xF
NI
NI
=
=
NI1/NI2 FORMULA
65536 96 f
65536 48 f
PCLK = 19.2MHz,
PCLK = 19.2MHz,
PCLK = 12MHz,
PCLK = 12MHz,
LRCLK = 16kHz
PCLK = 13MHz,
PCLK = 13MHz,
LRCLK = 16kHz
PCLK = 16MHz,
PCLK = 16MHz,
LRCLK = 16kHz
LRCLK = 16kHz
SAMPLE RATE
LRCLK = 8kHz
LRCLK = 8kHz
LRCLK = 8kHz
LRCLK = 8kHz
×
×
f
f
PCLK
PCLK
×
×
LRCLK
LRCLK
77

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