MAX9888EWY+T Maxim Integrated Products, MAX9888EWY+T Datasheet - Page 54

• Manufacturer Part Number: MAX9888EWY+T
• Description: IC CODEC AUDIO FLEXSOUND 63WLP
• Manufacturer: Maxim Integrated Products
• Series: DirectDrive®, FLEXSOUND™r
• Type: Class Dr

Specifications of MAX9888EWY+T

• Output Type: 3-Channel with Stereo Headphones
• Max Output Power X Channels @ Load: 1.37W x 2 @ 8 Ohm; 40mW x 2 @ 16 Ohm
• Voltage - Supply: 2.8 V ~ 5.5 V
• Features: Depop, Differential Inputs, I²S, Microphone, Mute, Shutdown
• Mounting Type: Surface Mount
• Package / Case: 63-WLP
• For Use With: MAX9888EVKIT+ - KIT EVALUATION FOR MAX9888
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Stereo Audio CODEC
with FLEXSOUND Technology
Configure the MAX9888 using the I
IC uses a slave address of 0x20 or 00100000 for write
operations and 0x21 or 00100001 for read operations.
See the I
face description.
Table 1. Register Map
54
STATUS
Status
Microphone
AGC/NG
Jack Status
Battery
Voltage
Interrupt
Enable
MASTER CLOCK CONTROL
Master Clock
DAI1 CLOCK CONTROL
Clock Mode
Any Clock
Control
DAI1 CONFIGURATION
Format
Clock
I/O
Configuration
Time-Division
Multiplex
Filters
DAI2 CLOCK CONTROL
Clock Mode
Any Clock
Control
DAI2 CONFIGURATION
Format
Clock
I/O
Configuration
REGISTER
2
C Serial Interface section for a complete inter-
MODE1
MAS1
MAS2
ICLD
PLL1
PLL2
CLD
B7
—
0
0
SLOTL1
JKSNS
OSR1
SEL1
SEL2
WCI1
WCI2
ISLD
SLD
NG
B6
—
0
0
SR1
SR2
LTEN1
AVFLT1
IULK
BCI1
BCI2
ULK
I
B5
2
—
—
0
0
0
C Slave Address
SLOTR1
2
PSCLK
C control bus. The
NI1[7:1]
NI2[7:1]
LBEN1 DMONO1 HIZOFF1 SDOEN1 SDIEN1
LBEN2 DMONO2 HIZOFF2 SDOEN2 SDIEN2
DLY1
DLY2
B4
—
—
0
0
0
NI1[14:8]
NI2[14:8]
DHF1
B3
—
—
0
0
0
0
0
0
0
VBAT
AGC
TDM1
TDM2
Table 1 lists all of the registers, their addresses, and
power-on-reset states. Registers 0x00 to 0x03 and 0xFF
are read-only while all of the other registers are read/
write. Write zeros to all unused bits in the register table
when updating the register, unless otherwise noted.
B2
—
—
SLOTDLY1
0
0
0
FREQ1
DVFLT1
BSEL1
BSEL2
IJDET
FSW1
FSW2
JDET
B1
—
0
0
NI1[0]
NI2[0]
WS1
WS2
B0
—
—
0
0
0
ADDRESS DEFAULT R/W PAGE
0x1A
0x1B
0x1C
0x1D
0x00
0x01
0x02
0x03
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
0x1E
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
—
—
—
—
Registers
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
103
101
102
103
65
76
76
77
77
71
72
72
73
79
76
77
77
71
72
72