MT47H128M8HQ-187EIT:G Micron Technology Inc, MT47H128M8HQ-187EIT:G Datasheet - Page 8
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MT47H128M8HQ-187EIT:G
Manufacturer Part Number
MT47H128M8HQ-187EIT:G
Description
Manufacturer
Micron Technology Inc
Datasheet
1.MT47H128M8HQ-187EITG.pdf
(136 pages)
Specifications of MT47H128M8HQ-187EIT:G
Lead Free Status / Rohs Status
Compliant
List of Tables
Table 1: Key Timing Parameters ....................................................................................................................... 2
Table 2: Addressing ......................................................................................................................................... 2
Table 3: FBGA 84-Ball – x16 and 60-Ball – x4, x8 Descriptions .......................................................................... 17
Table 4: Input Capacitance ............................................................................................................................ 22
Table 5: Absolute Maximum DC Ratings ......................................................................................................... 23
Table 6: Temperature Limits .......................................................................................................................... 24
Table 7: Thermal Impedance ......................................................................................................................... 25
Table 8: General I
Table 9: I
Table 10: DDR2 I
Table 11: DDR2 I
Table 12: AC Operating Specifications and Conditions .................................................................................... 34
Table 13: Recommended DC Operating Conditions (SSTL_18) ........................................................................ 46
Table 14: ODT DC Electrical Characteristics ................................................................................................... 47
Table 15: Input DC Logic Levels ..................................................................................................................... 48
Table 16: Input AC Logic Levels ...................................................................................................................... 48
Table 17: Differential Input Logic Levels ......................................................................................................... 49
Table 18: Differential AC Output Parameters ................................................................................................... 51
Table 19: Output DC Current Drive ................................................................................................................ 51
Table 20: Output Characteristics .................................................................................................................... 52
Table 21: Full Strength Pull-Down Current (mA) ............................................................................................. 53
Table 22: Full Strength Pull-Up Current (mA) .................................................................................................. 54
Table 23: Reduced Strength Pull-Down Current (mA) ...................................................................................... 55
Table 24: Reduced Strength Pull-Up Current (mA) .......................................................................................... 56
Table 25: Input Clamp Characteristics ............................................................................................................ 57
Table 26: Address and Control Balls ................................................................................................................ 58
Table 27: Clock, Data, Strobe, and Mask Balls ................................................................................................. 58
Table 28: AC Input Test Conditions ................................................................................................................ 59
Table 29: DDR2-400/533 Setup and Hold Time Derating Values (
Table 30: DDR2-667/800/1066 Setup and Hold Time Derating Values (
Table 31: DDR2-400/533
Table 32: DDR2-667/800/1066
Table 33: Single-Ended DQS Slew Rate Derating Values Using
Table 34: Single-Ended DQS Slew Rate Fully Derated (DQS, DQ at V
Table 35: Single-Ended DQS Slew Rate Fully Derated (DQS, DQ at V
Table 36: Single-Ended DQS Slew Rate Fully Derated (DQS, DQ at V
Table 37: Truth Table – DDR2 Commands ...................................................................................................... 73
Table 38: Truth Table – Current State Bank n – Command to Bank n ................................................................ 74
Table 39: Truth Table – Current State Bank n – Command to Bank m ............................................................... 76
Table 40: Minimum Delay with Auto Precharge Enabled ................................................................................. 77
Table 41: Burst Definition .............................................................................................................................. 81
Table 42: READ Using Concurrent Auto Precharge ......................................................................................... 101
Table 43: WRITE Using Concurrent Auto Precharge ....................................................................................... 107
Table 44: Truth Table – CKE .......................................................................................................................... 122
PDF: 09005aef821ae8bf
1GbDDR2.pdf – Rev. W 7/11 EN
DD7
Timing Patterns (8-Bank Interleave READ Operation) ................................................................. 27
DD
DD
DD
Specifications and Conditions (Die Revisions E and G) ...................................................... 28
Specifications and Conditions (Die Revision H) ................................................................ 31
Parameters ..................................................................................................................... 26
t
DS,
t
DH Derating Values with Differential Strobe ...................................................... 65
t
DS,
t
DH Derating Values with Differential Strobe ............................................. 66
8
t
DS
t
IS and
b
Micron Technology, Inc. reserves the right to change products or specifications without notice.
and
REF
REF
REF
t
) at DDR2-667 ...................................... 67
) at DDR2-533 ...................................... 68
) at DDR2-400 ...................................... 68
IS and
t
t
DH
IH) .................................................... 61
1Gb: x4, x8, x16 DDR2 SDRAM
b
................................................... 67
t
IH) ........................................... 62
2007 Micron Technology, Inc. All rights reserved.
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