CS4525-CNZ Cirrus Logic Inc, CS4525-CNZ Datasheet - Page 48

• Manufacturer Part Number: CS4525-CNZ
• Description: IC AMP AUDIO PWR 30W QUAD 48QFN
• Manufacturer: Cirrus Logic Inc
• Series: Popguard®r
• Type: Class Dr

Specifications of CS4525-CNZ

• Output Type: 2-Channel (Stereo) or 4-Channel (Quad)
• Package / Case: 48-QFN
• Max Output Power X Channels @ Load: 30W x 1 @ 4 Ohm; 15W x 2 @ 8 Ohm
• Voltage - Supply: 8 V ~ 18 V
• Features: ADC, Depop, I²C, I²S, Mute, PWM, Short-Circuit and Thermal Protection, Volume Control
• Mounting Type: Surface Mount
• Product: Class-D
• Output Power: 30 W
• Thd Plus Noise: 10 %
• Operating Supply Voltage: 2.5 V to 5 V
• Supply Current: 54 mA
• Maximum Power Dissipation: 180 mW
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Audio - Load Impedance: 4 Ohms, 6 Ohms, 8 Ohms
• Audio Load Resistance: 8 Ohms, 4 Ohms
• Minimum Operating Temperature: 0 C
• Supply Voltage (max): 5.25 V
• Supply Voltage (min): 2.375 V
• Amplifier Class: D
• No. Of Channels: 4
• Supply Voltage Range: 8V To 18V
• Load Impedance: 4ohm
• Operating Temperature Range: 0°C To +70°C
• Amplifier Case Style: QFN
• No. Of Pins: 48
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1586 - REFERENCE BOARD FOR CS4525 PWM
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1264

48
6.1.8.3
Out
6.1.8.4
Line-Out
1. Set the PDnAll bit in the Power Ctrl register to stop the PWM modulators if it is not already set.
2. Configure the PWM_SIG outputs as desired via the PWMDSel[1:0] bits in the Output Cfg register.
3. Clear the PDnAll bit in the Power Ctrl register to start the PWM modulators.
4. Wait 500 ms to allow the internal sample rate converters to achieve lock.
5. Set the HiZPSig bit in the EQ Config register to activate the PWM_SIG outputs.
1. Mute the PWM_SIG outputs to a 50% duty-cycle by either setting Master Volume to 1111 1111h
2. Clear the HiZPSig bit in the EQ Config register to put the PWM_SIG output drivers in a high-imped-
3. Power down the remainder of the system (if applicable).
Referenced Control
PDnAll .................................
HiZPSig ...............................
PWMDSel[1:0].....................
Master Volume ....................
(Master Mute) or through use of the HP_DETECT/MUTE input pin as described in the
Detection & Hardware Mute Input
ance state.
Recommended PWM_SIG Power-Up Sequence for Headphone & Line-
Recommended PWM_SIG Power-Down Sequence for Headphone &
Register Location
“Power Down (PDnAll)” on page 89
“Hi-Z PWM_SIG Outputs (HiZPSig)” on page 79
“PWM Signals Output Data Select (PWMDSel[1:0])” on page 73
“Master Volume Control (MVol[7:0])” on page 82
section on
page
51.
Headphone
CS4525
DS726PP2