SC16C852SVIET,157 NXP Semiconductors, SC16C852SVIET,157 Datasheet - Page 32

• Manufacturer Part Number: SC16C852SVIET,157
• Description: IC UART DL 1.8V W/FIFO 36-TFBGA
• Manufacturer: NXP Semiconductors

Specifications of SC16C852SVIET,157

• Features: Programmable
• Number Of Channels: 2, DUART
• Fifo's: 128 Byte
• Protocol: RS485
• Voltage - Supply: 1.8V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Package / Case: 36-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 935286451157; SC16C852SVIET; SC16C852SVIET

NXP Semiconductors
SC16C852SV_1
Product data sheet
7.15 Transmit Interrupt Level register (TXINTLVL)
7.16 Receive Interrupt Level register (RXINTLVL)
Table 24.
[1]
This 8-bit register is used store the transmit FIFO trigger levels used for interrupt
generation. Trigger levels from 1 to 128 can be programmed with a granularity of 1.
Table 25
Table 25.
[1]
This 8-bit register is used store the receive FIFO trigger levels used for interrupt
generation. Trigger levels from 1 to 128 can be programmed with a granularity of 1.
Table 26
Table 26.
[1]
Cont-3
1
X
X
X
1
0
1
Bit
7:0
Bit
7:0
When using a software flow control the Xon/Xoff characters cannot be used for data transfer.
For 32-byte FIFO mode, refer to
For 32-byte FIFO mode, refer to
Symbol
TXINTLVL[7:0]
Symbol
RXINTLVL[7:0]
shows trigger level register bit settings.
shows trigger level register bit settings.
Cont-2
1
X
X
X
0
1
1
Software flow control functions
TXINTLVL register bits description
RXINTLVL register bits description
Dual UART with 128-byte FIFOs, IrDA, and XScale VLIO bus interface
Cont-1
X
0
1
0
1
1
1
Rev. 01 — 23 September 2008
Description
This register stores the programmable transmit interrupt trigger levels for
128-byte FIFO mode.
Description
This register stores the programmable receive interrupt trigger levels for
128-byte FIFO mode.
0x00 = trigger level is set to 1
0x01 = trigger level is set to 1
...
0x80 = trigger level is set to 128
0x00 = trigger level is set to 1
0x01 = trigger level is set to 1
...
0x80 = trigger level is set to 128
Cont-0
X
0
0
1
1
1
1
Section 7.3 “FIFO Control Register
Section 7.3 “FIFO Control Register
TX, RX software flow controls
Transmit Xon1 and Xon2/Xoff1 and Xoff2
No receive flow control
Receiver compares Xon1/Xoff1
Receiver compares Xon2/Xoff2
Transmit Xon1/Xoff1
Receiver compares Xon1 or Xon2, Xoff1 or Xoff2
Transmit Xon2/Xoff2
Receiver compares Xon1 or Xon2, Xoff1 or Xoff2
Transmit Xon1 and Xon2, Xoff1 and Xoff2
Receiver compares Xon1 and Xon2, Xoff1 and Xoff2
[1]
[1]
[1]
…continued
(FCR)”.
(FCR)”.
SC16C852SV
© NXP B.V. 2008. All rights reserved.
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