SC68C752BIBS,157 NXP Semiconductors, SC68C752BIBS,157 Datasheet - Page 48
![IC UART DUAL 32HVQFN](/photos/6/51/65170/568-32-hvqfn_sml.jpg)
SC68C752BIBS,157
Manufacturer Part Number
SC68C752BIBS,157
Description
IC UART DUAL 32HVQFN
Manufacturer
NXP Semiconductors
Datasheet
1.SC68C752BIBS128.pdf
(48 pages)
Specifications of SC68C752BIBS,157
Number Of Channels
2, DUART
Fifo's
64 Byte
Voltage - Supply
2.5V, 3.3V, 5V
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
Mounting Type
Surface Mount
Package / Case
32-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935280969157
SC68C752BIBS
SC68C752BIBS
SC68C752BIBS
SC68C752BIBS
NXP Semiconductors
18. Contents
1
2
3
4
5
5.1
5.2
6
6.1
6.2
6.2.1
6.2.2
6.3
6.3.1
6.3.2
6.3.3
6.3.3.1
6.4
6.5
6.5.1
6.5.2
6.6
6.6.1
6.6.1.1
6.6.1.2
6.6.2
6.6.2.1
6.6.2.2
6.7
6.8
6.9
7
7.1
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
7.10
7.11
7.12
7.13
7.14
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Ordering information . . . . . . . . . . . . . . . . . . . . . 2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
Functional description . . . . . . . . . . . . . . . . . . . 7
Register descriptions . . . . . . . . . . . . . . . . . . . 19
Auto-RTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Auto-CTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Software flow control example . . . . . . . . . . . . 11
DMA operation . . . . . . . . . . . . . . . . . . . . . . . . 15
Single DMA transfers
(DMA mode 0/FIFO disable). . . . . . . . . . . . . . 15
Programmable baud rate generator . . . . . . . . 17
Interrupt Enable Register (IER) . . . . . . . . . . . 27
Interrupt Identification Register (IIR). . . . . . . . 28
Enhanced Feature Register (EFR) . . . . . . . . . 29
Transmission Control Register (TCR). . . . . . . 29
Trigger Level Register (TLR) . . . . . . . . . . . . . 30
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
Trigger levels . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Hardware flow control . . . . . . . . . . . . . . . . . . . . 7
Software flow control . . . . . . . . . . . . . . . . . . . . 9
Receive flow control . . . . . . . . . . . . . . . . . . . . 10
Transmit flow control. . . . . . . . . . . . . . . . . . . . 10
Assumptions . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Interrupt mode operation . . . . . . . . . . . . . . . . 14
Polled mode operation . . . . . . . . . . . . . . . . . . 14
Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Block DMA transfers (DMA mode 1). . . . . . . . 16
Transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Sleep mode . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Break and time-out conditions . . . . . . . . . . . . 17
Receiver Holding Register (RHR). . . . . . . . . . 21
Transmit Holding Register (THR) . . . . . . . . . . 21
FIFO Control Register (FCR) . . . . . . . . . . . . . 22
Line Control Register (LCR) . . . . . . . . . . . . . . 23
Line Status Register (LSR) . . . . . . . . . . . . . . . 24
Modem Control Register (MCR) . . . . . . . . . . . 25
Modem Status Register (MSR) . . . . . . . . . . . . 26
Divisor latches (DLL, DLM). . . . . . . . . . . . . . . 29
FIFO ready register . . . . . . . . . . . . . . . . . . . . 30
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs
8
9
10
11
11.1
12
13
13.1
13.2
13.3
13.4
14
15
16
16.1
16.2
16.3
16.4
17
18
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Programmer’s guide . . . . . . . . . . . . . . . . . . . . 31
Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 33
Static characteristics . . . . . . . . . . . . . . . . . . . 34
Dynamic characteristics. . . . . . . . . . . . . . . . . 35
Package outline. . . . . . . . . . . . . . . . . . . . . . . . 41
Soldering of SMD packages . . . . . . . . . . . . . . 43
Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 45
Revision history . . . . . . . . . . . . . . . . . . . . . . . 46
Legal information . . . . . . . . . . . . . . . . . . . . . . 47
Contact information . . . . . . . . . . . . . . . . . . . . 47
Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Timing diagrams. . . . . . . . . . . . . . . . . . . . . . . 36
Introduction to soldering. . . . . . . . . . . . . . . . . 43
Wave and reflow soldering. . . . . . . . . . . . . . . 43
Wave soldering . . . . . . . . . . . . . . . . . . . . . . . 43
Reflow soldering . . . . . . . . . . . . . . . . . . . . . . 44
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 47
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 47
SC68C752B
Document identifier: SC68C752B_4
Date of release: 20 January 2010
All rights reserved.