SC16C650BIA44,512 NXP Semiconductors, SC16C650BIA44,512 Datasheet - Page 5
![IC UART SOT187-2](/photos/6/98/69845/568-44-plcc_sot187-2_sml.jpg)
SC16C650BIA44,512
Manufacturer Part Number
SC16C650BIA44,512
Description
IC UART SOT187-2
Manufacturer
NXP Semiconductors
Datasheet
1.SC16C650BIB48151.pdf
(48 pages)
Specifications of SC16C650BIA44,512
Number Of Channels
1, UART
Fifo's
32 Byte
Voltage - Supply
2.5V, 3.3V, 5V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
44-LCC (J-Lead)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935274392512
SC16C650BIA44
SC16C650BIA44
SC16C650BIA44
SC16C650BIA44
NXP Semiconductors
Table 2.
SC16C650B_4
Product data sheet
Symbol
A0
A1
A2
AS
BAUDOUT
CS0
CS1
CS2
CS
CTS
Pin description
Pin
PLCC44 LQFP48 HVQFN32
31
30
29
28
17
14
15
16
-
40
5.2 Pin description
28
27
26
24
12
9
10
11
-
38
Fig 4.
18
17
16
-
8
-
-
-
7
25
Pin configuration for HVQFN32
Type
I
I
I
I
O
I
I
I
I
I
Rev. 04 — 14 September 2009
index area
terminal 1
BAUDOUT
RCLK
Description
Register select. A0 to A2 are sued during read and write
operations to select the UART register to read from or write to.
Refer to
description.
Address strobe. When AS is active (LOW), A0, A1 and A2 and
CS0 CS1 and CS2 drive the internal select logic directly. When AS
is HIGH, the register select and chip select signals are held at the
logic levels they were in when the LOW-to-HIGH transition of AS
occurred.
Baud out. BAUDOUT is a 16 clock signal for the transmitter
section of the UART. The clock rate is established by the reference
oscillator frequency divided by a divisor specified in the baud
generator divisor latches. BAUDOUT may also be used for the
receiver section by tying this output to RCLK.
Chip select. When CS0 and CS1 are HIGH and CS2 is LOW, these
3 inputs select the UART. When any of these inputs are inactive, the
UART remains inactive (refer to AS description).
Clear to send. CTS is a modem status signal. Its condition can be
checked by reading bit 4 (CTS) of the Modem Status Register
(MSR). MSR[0] ( CTS) indicates that CTS has changed states
since the last read from the MSR. If the modem status interrupt is
enabled when CTS changes levels and the auto-CTS mode is not
enabled, an interrupt is generated. CTS is also used in the
auto-CTS mode to control the transmitter.
RX
CS
D5
D6
D7
TX
1
2
3
4
5
6
7
8
UART with 32-byte FIFOs and IrDA encoder/decoder
Table 3
Transparent top view
SC16C650BIBS
for register addresses and refer to signal AS
24
23
22
21
20
19
18
17
002aaa947
RESET
OUT
DTR
RTS
INT
RXRDY
A0
A1
SC16C650B
© NXP B.V. 2009. All rights reserved.
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