PEF 82912 F V1.4 Infineon Technologies, PEF 82912 F V1.4 Datasheet - Page 185

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PEF 82912 F V1.4

Manufacturer Part Number
PEF 82912 F V1.4
Description
IC MODULAR ISDN NT INTELL TQFP64
Manufacturer
Infineon Technologies
Series
Q-SMINT®r
Datasheets

Specifications of PEF 82912 F V1.4

Function
Second Generation Modular
Interface
ISDN
Mounting Type
Surface Mount
Package / Case
64-LFTQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Voltage - Supply
-
Power (watts)
-
Operating Temperature
-
Number Of Circuits
-
Other names
PEF82912FV1.4XT
PEF82912FV14XP
SP000007558
SP000007559
4.9.7
SDS1_CR
Value after reset: 00
This register is used to select position and length of the strobe signal 1. The length can
be any combination of two 8-bit timeslot (ENS_TSS, ENS_TSS+1) and one 2-bit timeslot
(ENS_TSS+3).
ENS_
TSS
ENS_
TSS+1
ENS_
TSS+3
TSS
Data Sheet
ENS_
TSS
7
SDS1_CR - Control Register Serial Data Strobe 1
Enable Serial Data Strobe of timeslot TSS
0 =
1 =
Enable Serial Data Strobe of timeslot TSS+1
0 =
1 =
Enable Serial Data Strobe of timeslot TSS+3 (D-Channel)
0 =
1 =
Timeslot Selection
Selects one of 12 timeslots on the IOM
during which SDS1 is active high. The data strobe signal allows standard
data devices to access a programmable channel.
TSS+1
ENS_
The serial data strobe signal SDS1 is inactive during TSS
The serial data strobe signal SDS1 is active during TSS
The serial data strobe signal SDS1 is inactive during TSS+1
The serial data strobe signal SDS1 is active during TSS+1
The serial data strobe signal SDS1 is inactive during the D-channel
(bit7, 6) of TSS+3
The serial data strobe signal SDS1 is active during the D-channel
(bit7, 6) of TSS+3
H
TSS+3
ENS_
0
read/write
171
®
-2 interface (with respect to FSC)
TSS
Register Description
PEF 82912/82913
Address:
2001-03-30
0
54
H

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