PEB 20954 HT V1.1 Infineon Technologies, PEB 20954 HT V1.1 Datasheet - Page 94

• Manufacturer Part Number: PEB 20954 HT V1.1
• Description: IC SIDEC T/E 32CHAN TQFP-144-8
• Manufacturer: Infineon Technologies

Specifications of PEB 20954 HT V1.1

• Function: Smart Integrated Digital Echo Canceller (SIDEC)
• Interface: PCM, Serial, UCC
• Number Of Circuits: 4
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 350mA
• Power (watts): 900mW
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 144-LFQFP
• Includes: Double Talk Detection, Maskable Disabling, Voiceband Echo Cancelling
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: PEB20954HTV1.1T; PEB20954HTV11XP; SP000007504; SP000007506

IDLEMASK [7:0]
IDLEPATTERN[7:0] (Addr.: 34H): Idlepattern, write protected, Reset value = 55H
The reset value corresponds to a level minus infinity for A-Law encoding
IDLEPATTERN [7:0] IDLE Pattern for comparison with the receive values
CONFTS16[5:0] (Addr.: 31H) Configuration of TS16 CAS Evaluation for E1 frames,
write protected, Reset value = 12H
ENTS16
SELSITS16
FLINV
FLSEL [1:0]
FLFREEZE
CONFUCC[6:0] (Addr.: 60H): Configuration of UCC Interface, write protected,
Reset value = 00H
Data Sheet
TERN[7]
IDLE
PAT
-
-
TERN[6]
LISTEN
IDLE
PAT
R
-
'1': The corresponding bit is ignored for pattern comparison
'0': normal operation (bit comparison enabled)
'1': TS16 CAS Evaluation enabled
'0': TS16 CAS Evaluation disabled
'1': TS16 CAS Evaluation operates on send path input
'0': TS16 CAS Evaluation operates on receive path input
Inversion of selected flag bit, "Active" means an enabled time slot.
A change of this bit means a change of the incoming TS 16 flag bit.
'1': flag bit is active '0'
'0': flag bit is active '1'
Selection of flag bit (MSB of TS 16 is bit 7):
"00": En/Disable via D-Bit (bit 4 and bit 0 of TS 16 are evaluated)
"01": En/Disable via C-Bit (bit 5 and bit 1 of TS 16 are evaluated)
"10": En/Disable via B-Bit (bit 6 and bit 2 of TS 16 are evaluated)
"11": En/Disable via A-Bit (bit 7 and bit 3 of TS 16 are evaluated)
'1': Freeze (no update) of flag bits
'0': normal operation
TERN[5]
if CONFIDLE.IDLEMODE = '0'
ENTS16
TUCCO
IDLE
PAT
EN
TERN[4]
DISHW
SELSI
TS16
IDLE
PAT
EN
94
TERN[3]
FLINV
FX[1]
IDLE
PAT
SEL
TERN[2]
SEL[1]
FX[0]
IDLE
PAT
SEL
FL
Register Description
TERN[1]
SEL[0]
SMLP
IDLE
PAT
HW
EN
FL
Rev. 2, 2004-07-28
PEB 20954
PEF 20954
FREEZE
TERN[0]
CTRL
RSW
IDLE
PAT
FL