PEB 20954 HT V1.1 Infineon Technologies, PEB 20954 HT V1.1 Datasheet - Page 91

• Manufacturer Part Number: PEB 20954 HT V1.1
• Description: IC SIDEC T/E 32CHAN TQFP-144-8
• Manufacturer: Infineon Technologies

Specifications of PEB 20954 HT V1.1

• Function: Smart Integrated Digital Echo Canceller (SIDEC)
• Interface: PCM, Serial, UCC
• Number Of Circuits: 4
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 350mA
• Power (watts): 900mW
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 144-LFQFP
• Includes: Double Talk Detection, Maskable Disabling, Voiceband Echo Cancelling
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: PEB20954HTV1.1T; PEB20954HTV11XP; SP000007504; SP000007506

FSHRESET
FSCONVDIS
CONFFLEXUCC[5:0] (Addr.: 6DH): Configuration of the flexible UCC control bit (FX-
Bit), write protected, Reset value = 00H
This register determines the function of the FX-Bit of the UCC signal. The FX bit is
defined in register CONUCC.SELFX.
FUBYPASS
FUNLPDIS
FUFREEZE
FUSCURESET
FUHRESET
FUCONVDIS
Note: Clear channel (64 clear) control by the FX-Bit can be enabled by setting this
register to "xx1xxxx1"
CONFFLEXMON[7:0] (Addr.: 6FH): Configuration of Flexible Monitor Signals,
Reset value = FEH
Data Sheet
MON1[3]
CONF
FLEX
-
MON1[2]
CONF
FLEX
-
'1': The FX-Bit leads to bypassing of the PCM signal of the entire
'1': THE FX-Bit resets the attenuation meters in the speech
'0': No reset of the attenuation meters unit by FLEXSCTR
'1': serial control signal at pin FLEXSCTR resets the H-Register
'0': No reset of the H-Register by FLEXSCTR
'1': serial control signal at pin FLEXSCTR disables the PCM-Law
'0': No disable of the PCM-Law conversion by FLEXSCTR
'0': No bypass of the entire compensator by the FX-Bit
'1': THE FX-Bit disables the NLP and attenuator
'0': No disabling of the NLP and attenuator by the FX-Bit
'1': THE FX-Bit freezes the H-Register
'0': No freeze of the H-Register by the FX-Bit
'0': No reset of the attenuation meters by the FX-Bit
'1': THE FX-Bit resets the H-Register
'0': No reset of the H-Register by the FX-Bit
'1': THE FX-Bit disables the PCM-Law conversion (in receive and
'0': No disable of the PCM-Law conversion by the FX-Bit
BYPASS
MON1[1]
conversion (in receive and send path)
cancelling path (canceller, NLP, attenuator in receive and send
path)
controling unit
send path)
CONF
FLEX
FU
MON1[0]
NLPDIS
CONF
FLEX
FU
91
MON2[3]
FREEZE
CONF
FLEX
FU
MON2[2]
RESET
CONF
FLEX
SCU
FU
Register Description
HRESET
MON2[1]
CONF
FLEX
FU
Rev. 2, 2004-07-28
PEB 20954
PEF 20954
MON2[0]
CONV
CONF
FLEX
DIS
FU