SI3019-KT Silicon Laboratories Inc, SI3019-KT Datasheet - Page 64

• Manufacturer Part Number: SI3019-KT
• Description: IC VOICE DAA GCI/PCM/SPI 16TSSOP
• Manufacturer: Silicon Laboratories Inc
• Type: Chipsetr

Specifications of SI3019-KT

• Package / Case: 16-TSSOP
• Function: Data Access Arrangement (DAA)
• Interface: GCI, PCM, SPI
• Number Of Circuits: 1
• Voltage - Supply: 3 V ~ 3.6 V
• Current - Supply: 8.5mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Includes: Line Voltage Monitor, Loop Current Monitor, Overload Detection, Parallel Handset Detection, Polarity Reversal Detection, TIP and
• Product: Modem Chip
• Supply Voltage (min): 3 V
• Supply Current: 8.5 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power (watts): -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant

Si3018/19/10
Register 20. Call Progress Receive Attenuation
Reset settings = 0000_0000
Register 21. Call Progress Transmit Attenuation
Reset settings = 0000_0000
64
Bit
7:0
Bit
7:0
Name
Name
Type
Type
Bit
Bit
ARM[7:0]
ATM[7:0]
Name
Name
D7
D7
D6
AOUT Receive Path Attenuation.
When decremented from the default setting, these bits linearly attenuate the AOUT
receive path signal used for call progress monitoring. Setting the bits to all 0s mutes the
AOUT receive path.
Attenuation = 20 log(ARM[7:0]/64)
1111_1111 = +12 dB (gain)
0111_1111 = +6 dB (gain)
0100_0000 = 0 dB
0010_0000 = –6 dB (attenuation)
0001_0000 = –12 dB
.
.
.
0000_0000 = Mute
AOUT Transmit Path Attenuation.
When decremented from the default settings, these bits linearly attenuate the AOUT trans-
mit path signal used for call progress monitoring. Setting the bits to all 0s mutes the AOUT
transmit path.
Attenuation = 20 log(ATM[7:0]/64)
1111_1111 = +12 dB (gain)
0111_1111 = +6 dB (gain)
0100_0000 = 0 dB
0010_0000 = –6 dB (attenuation)
0001_0000 = –12 dB
.
.
.
0000_0000 = Mute
D6
D5
D5
D4
D4
ARM[7:0]
ATM[7:0]
R/W
R/W
D3
D3
Rev. 1.03
D2
D2
Function
Function
D1
D1
D0
D0