DS2155LNC2+ Maxim Integrated Products, DS2155LNC2+ Datasheet - Page 208

IC TXRX T1/E1/J1 SGL 100-LQFP

DS2155LNC2+

Manufacturer Part Number
DS2155LNC2+
Description
IC TXRX T1/E1/J1 SGL 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS2155LNC2+

Function
Single-Chip Transceiver
Interface
E1, HDLC, J1, T1
Number Of Circuits
1
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
75mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
BERT Generator and Detector, CMI Coder and Decoder, HDLC Controller
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
35.
35.1 T1 Mode
Figure 35-1. Receive-Side D4 Timing
Note 1: RSYNC in the frame mode (IOCR1.5 = 0) and double-wide frame sync is not enabled (IOCR1.6 = 0).
Note 2: RSYNC in the frame mode (IOCR1.5 = 0) and double-wide frame sync is enabled (IOCR1.6 = 1).
Note 3: RSYNC in the multiframe mode (IOCR1.5 = 1).
Note 4: RLINK data (Fs bits) is updated one bit prior to even frames and held for two frames.
Figure 35-2. Receive-Side ESF Timing
Note 1: RSYNC in frame mode (IOCR1.4 = 0) and double-wide frame sync is not enabled (IOCR1.6 = 0).
Note 2: RSYNC in frame mode (IOCR1.4 = 0) and double-wide frame sync is enabled (IOCR1.6 = 1).
Note 3: RSYNC in multiframe mode (IOCR1.4 = 1).
Note 4: ZBTSI mode disabled (T1RCR2.2 = 0).
Note 5: RLINK data (FDL bits) is updated one bit time before odd frames and held for two frames.
Note 6: ZBTSI mode is enabled (T1RCR2.2 = 1).
Note 7: RLINK data (Z bits) is updated one bit time before odd frames and held for four frames.
RFSYNC
FRAME#
RFSYNC
RSYNC
RLCLK
RSYNC
TLCLK
FRAME#
RSYNC
RSYNC
RSYNC
RSYNC
RLINK
RLINK
RLCLK
TLINK
FUNCTIONAL TIMING DIAGRAMS
4
5
6
4
3
1
2
3
7
1
2
1
1
2
3
2
4
5
3
6
4
7
8
5
9 10 11 12
6
7
208 of 238
13 14 15 16 17 18 19 20 21 22 23 24 1
8
9
10
11
12
1
2
3
2
4
3
4
5
5

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