SI3210M-FT Silicon Laboratories Inc, SI3210M-FT Datasheet - Page 101

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SI3210M-FT

Manufacturer Part Number
SI3210M-FT
Description
IC SLIC/CODEC PROG 1CH 38TSSOP
Manufacturer
Silicon Laboratories Inc
Series
ProSLIC®r
Datasheets

Specifications of SI3210M-FT

Function
Subscriber Line Interface Concept (SLIC), CODEC
Interface
PCM, SPI
Number Of Circuits
1
Voltage - Supply
3.3V, 5V
Current - Supply
88mA
Power (watts)
700mW
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
*
Includes
BORSCHT Functions, DTMF Generation and Decoding, FSK Generation, Pulse Metering Generation, Voice Loopback Test Modes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI3210M-FT
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Company:
Part Number:
SI3210M-FTR
Quantity:
1 617
Register 74. High Battery Voltage
Reset settings = 0011_0010
Register 75. Low Battery Voltage
Reset settings = 0001_0000
Name
Name
Bit
7:6
5:0
Bit
7:6
5:0
Type
Type
Bit
Bit
VBATH[5:0]
VBATL[5:0]
Reserved
Reserved
Name
Name
D7
D7
Read returns zero.
High Battery Voltage.
The value written to this register sets high battery voltage. V
equal to VBATL. The value may be set between 0 V (0x00) and –94.5 V (0x3F) in 1.5 V
steps. Default value = –75 V. For Si3211, V
at the V
page 22 and Figure 14 on page 26.
Read returns zero.
Low Battery Voltage.
The value written to this register sets low battery voltage. V
equal to V
steps. Default value = –24 V. For Si3211, V
at the V
page 22 and Figure 14 on page 26.
D6
D6
BATL
BATL
BATL
node shown in the Si3211 typical application circuit drawings, Figure 12 on
node shown in the Si3211 typical application circuit drawings, Figure 12 on
. The value may be set between 0 V (0x00) and –94.5 V (0x3F) in 1.5 V
D5
D5
Rev. 1.45
D4
D4
Function
Function
D3
D3
BATL
BATL
VBATH[5:0]
VBATL[5:0]
must be set equal to the voltage supplied
must be set equal to the voltage supplied
R/W
R/W
D2
D2
Si3210/Si3211
BATH
BATH
must be greater than or
must be greater than or
D1
D1
D0
D0
101

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