ISP1161A1BD,118 NXP Semiconductors, ISP1161A1BD,118 Datasheet - Page 19

• Manufacturer Part Number: ISP1161A1BD,118
• Manufacturer: NXP Semiconductors

Specifications of ISP1161A1BD,118

• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Compliant

Philips Semiconductors
9397 750 13961
Product data
Fig 18. DMA transfer in burst mode.
N = 1/2 byte count of transfer data, K = number of cycles/burst.
RD or WR
D [ 15:0 ]
DREQ
DACK
EOT
data #1
8.6.1 Pin configuration
8.6 Interrupts
In both figures, the hardware is configured such that DREQ is active HIGH and DACK
is active LOW.
The ISP1161A1 has separate interrupt request pins for the USB HC (INT1) and the
USB DC (INT2).
The interrupt output signals have four configuration modes:
Mode 0
Mode 1
Mode 2
Mode 3
Figure 19
via the HcHardwareConfiguration register (see
disable or enable the signals.
data #K
shows these four interrupt configuration modes. They are programmable
Level trigger, active LOW (default at power-up)
Level trigger, active HIGH
Edge trigger, active LOW
Edge trigger, active HIGH.
data #(K 1)
Rev. 03 — 23 December 2004
data #2K
USB single-chip host and device controller
data #(N K 1)
Section
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
10.4.1), which is also used to
ISP1161A1
data #N
004aaa104
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