MT48LC2M32B2TG-7:GTR Micron Technology Inc, MT48LC2M32B2TG-7:GTR Datasheet - Page 28
![](/photos/40/77/407734/tsop-ii-86_sml.jpg)
MT48LC2M32B2TG-7:GTR
Manufacturer Part Number
MT48LC2M32B2TG-7:GTR
Description
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet
1.MT48LC2M32B2TG-7GTR.pdf
(69 pages)
Specifications of MT48LC2M32B2TG-7:GTR
Organization
2Mx32
Density
64Mb
Address Bus
13b
Access Time (max)
17/8/5.5ns
Maximum Clock Rate
143MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
160mA
Pin Count
86
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Not Compliant
Figure 15:
PDF: 09005aef811ce1fe/Source: 09005aef811ce1d5
64MSDRAMx32_2.fm - Rev. J 12/08 EN
Terminating a READ Burst
Note:
COMMAND
COMMAND
COMMAND
ADDRESS
ADDRESS
ADDRESS
DQM is LOW.
CLK
CLK
CLK
DQ
DQ
DQ
BANK,
BANK,
COL n
COL n
T0
T0
T0
BANK,
COL n
READ
READ
READ
CL = 1
CL = 2
T1
T1
T1
NOP
NOP
NOP
D
OUT
n
CL = 3
28
T2
T2
T2
NOP
NOP
NOP
D
D
n + 1
OUT
OUT
n
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T3
T3
T3
NOP
NOP
NOP
D
n + 2
D
n + 1
D
OUT
OUT
OUT
n
TERMINATE
TERMINATE
TERMINATE
T4
BURST
T4
BURST
T4
BURST
X = 0 cycles
X = 1 cycle
D
D
n + 3
n + 2
D
n + 1
OUT
OUT
OUT
X = 2 cycles
T5
T5
T5
NOP
NOP
NOP
D
n + 3
D
n + 2
OUT
OUT
©2001 Micron Technology, Inc. All rights reserved.
64Mb: x32 SDRAM
T6
T6
T6
NOP
NOP
NOP
D
n + 3
OUT
DON’T CARE
Commands
T7
NOP