NUC140VE3CN Nuvoton Technology Corporation of America, NUC140VE3CN Datasheet - Page 498

• Manufacturer Part Number: NUC140VE3CN
• Description: IC MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro™ NUC100r

Specifications of NUC140VE3CN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

NuMicro™ NUC130/NUC140 Technical Reference Manual
5.18.4 Function Description
The PDMA controller has nine channels of DMA associated with Peripheral-to-Memory 、 Memory-
to-Peripheral or Memory-to-Memory. For each PDMA channel, there is one word memory as
transfer buffer between the Peripherals APB IP and Memory.
The CPU can recognize the completion of a PDMA operation by software polling or when it
receives an internal PDMA interrupt. As to the source and destination address, the PDMA
controller has two modes: increased and fixed.
Every PDMA default channel behavior is not pre-defined, so users must configure the channel
service settings of PDMA_PDSSR0, PDMA_PDSSR1 and PDMA_PDSSR2 before start the
related PDMA channel.
Software must enable DMA channel PDMA [PDMACEN] and then write a valid source address to
the PDMA_SARx register, a destination address to the PDMA_DARx register, and a transfer
count to the PDMA_BCRx register. Next, trigger the DMA_CSRx PDMA [TRIG_EN]. PDMA will
continue the transfer until PDMA_CBCRx comes down to zero, If an error occurs during the
PDMA operation, the channel stops unless software clears the error condition and sets the
PDMA_CSRx [SW_RST] to reset the PDMA channel and set PDMA_CSRx [PDMACEN] and
[TRIG_EN] bits field to start again.
In PDMA (Peripheral-to-Memory or Memory-to-Peripheral) mode, DMA can transfer data between
the Peripherals APB IP (ex: UART, SPI, ADC….) and Memory.
Publication Release Date: June 14, 2011
- 498 -
Revision V2.01