NUC140VE3CN Nuvoton Technology Corporation of America, NUC140VE3CN Datasheet - Page 141

• Manufacturer Part Number: NUC140VE3CN
• Description: IC MCU 32BIT 128KB FLASH 100LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro™ NUC100r

Specifications of NUC140VE3CN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 76
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Clock Source Select Control Register 0 (CLKSEL0)
Register
CLKSEL0
Bits
[31:6]
[5:3]
[2:0]
31
23
15
7
NuMicro™ NUC130/NUC140 Technical Reference Manual
Reserved
Offset
CLK_BA+0x10
Descriptions
Reserved
STCLK_S
HCLK_S
30
22
14
6
R/W
R/W
Reserved
Cortex_M0 SysTick clock source select (write-protection bits)
If SYST_CSR[2]=0, SysTick uses listed clock source below
These bits are protected bit. It means programming this bit needs to write “59h”, “16h”,
“88h” to address 0x5000_0100 to disable register protection. Reference the register
REGWRPROT at address GCR_BA+0x100.
000 = Clock source from external 4~24 MHz high speed crystal clock
001 = Clock source from external 32.768 kHz low speed crystal clock
010 = Clock source from external 4~24 MHz high speed crystal clock/2
011 = Clock source from HCLK/2
111 = Clock source from internal 22.1184 MHz high speed oscillator clock/2
HCLK clock source select (write-protection bits)
1.
2.
3.
000 = Clock source from external 4~24 MHz high speed crystal clock
001 = Clock source from external 32.768 kHz low speed crystal clock
010 = Clock source from PLL clock
011 = Clock source from internal 10 kHz low speed oscillator clock
29
21
13
5
Before clock switching, the related clock sources (both pre-select and new-
select) must be turn on
The 3-bit default value is reloaded from the value of CFOSC (Config0[26:24]) in
user configuration register of Flash controller by any reset. Therefore the default
value is either 000b or 111b.
These bits are protected bit, It means programming this bit needs to write “59h”,
“16h”, “88h” to address 0x5000_0100 to disable register protection. Reference
the register REGWRPROT at address GCR_BA+0x100.
Description
Clock Source Select Control Register 0
STCLK_S
28
20
12
4
- 141 -
Reserved
Reserved
Reserved
27
19
11
3
Publication Release Date: June 14, 2011
26
18
10
2
HCLK_S
9
1
25
17
Revision V2.01
Reset Value
0x0000_003X
8
0
24
16