SI2110-D-FMR Silicon Laboratories Inc, SI2110-D-FMR Datasheet - Page 95
![no-image](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_sml.jpg)
SI2110-D-FMR
Manufacturer Part Number
SI2110-D-FMR
Description
Manufacturer
Silicon Laboratories Inc
Datasheet
1.SI2110-D-FMR.pdf
(98 pages)
Specifications of SI2110-D-FMR
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Supplier Unconfirmed
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Notes - General:
Notes - Solder Mask Design:
Notes - Stencil Design:
Notes - Card Assembly:
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. Dimensioning and Tolerancing is per the ANSI Y14.5M-1994 specification.
3. This Land Pattern Design is based on IPC-SM-782 guidelines.
4. All dimensions shown are at Maximum Material Condition (MMC). Least
1. All metal pads are to be non-solder mask defined (NSMD). Clearance between
1. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls
2. The stencil thickness should be 0.125mm (5 mils).
3. The ratio of stencil aperture to land pad size should be 1:1 for the perimeter
4. A 3x6 array of 0.70mm square openings on 0.95mm pitch should be used for
1. A No-Clean, Type-3 solder paste is recommended.
2. The recommended card reflow profile is per the JEDEC/IPC J-STD-020C
Material Condition (LMC) is calculated based on a Fabrication Allowance of
0.05 mm.
the solder mask and the metal pad is to be 60 µm minimum, all the way around
the pad.
should be used to assure good solder paste release.
pads.
the center ground pad.
specification for Small Body Components.
Dimension
GE
GD
ZD
E2
D2
ZE
E
D
X
Y
e
Table 21. PCB Land Pattern Dimensions
Rev. 1.0
6.00
2.70
6.71
4.71
Min
—
—
—
0.50 BSC
7.51 REF
5.51 REF
0.80 REF
Si2107/08/09/10
Max
6.20
2.90
0.28
8.31
6.31
--
--
95
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